Apparatus for Simulating a High Five
A self-righting hand-arm configuration which is adapted to pivot when struck by a user, thereby simulating a "high five."
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AbstractA novel process for forming a robust, sub-100 Å oxide is disclosed. Native oxide growth is tightly controlled by flowing pure nitrogen during wafer push and nitrogen with a small amount of oxygen during temperature ramp and stabilization. First, a dry oxidation is performed in oxygen and 13% trichloroethane. Next, a wet oxidation in pyrogenic steam is performed to produce a total oxide thickness of approximately 80 Å. The oxide layer formed is ideally suited for use as a high integrity gate oxide below 100 Å. The invention is particularly useful in devices with advanced, recessed field isolation where sharp silicon edges are difficult to oxidize. For an oxide layer of more than 100 Å, a composite oxide stack is used which comprises 40-90 Å of pad oxide formed using the above novel process, and 60-200 Å of deposited oxide.Other References
| InventorsAssigneeApplicationNo. 08528188 filed on 09/14/1995US Classes:438/773, In atmosphere containing water vapor (i.e., wet oxidation)438/774, In atmosphere containing halogen438/762, At least one layer formed by reaction with substrate438/297, Recessed oxide formed by localized oxidation (i.e., LOCOS)438/287, Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound438/452, Plural oxidation steps to form recessed oxide257/E21.193, On single crystalline silicon (EPO)257/E21.285Of silicon (EPO)Field of Search438/762, At least one layer formed by reaction with substrate438/763, Layers formed of diverse composition or by diverse coating processes438/770, Oxidation438/771, Using electromagnetic or wave energy438/772, Microwave gas energizing438/773, In atmosphere containing water vapor (i.e., wet oxidation)438/774In atmosphere containing halogenExaminersPrimary: Booth, Richard A.Attorney, Agent or FirmUS Patent References3556879, 4159917, Method for use in the manufacture of semiconductor devicesIssued on: 07/03/1979 Inventor: Gluck4231809, Method of removing impurity metals from semiconductor devices Issued on: 11/04/1980 Inventor: Schmidt4344985, Method of passivating a semiconductor device with a multi-layer passivant system by thermally growing a layer of oxide on an oxygen doped polycrystalline silicon layer Issued on: 08/17/1982 Inventor: Goodman , et al.4551910, MOS Isolation processing Issued on: 11/12/1985 Inventor: Patterson4906595, Method of manufacturing a semiconductor device, in which a silicon wafer is provided at its surface with field oxide regions Issued on: 03/06/1990 Inventor: van der Plas, et al.4994894, Semiconductor device having an improved wiring pattern Issued on: 02/19/1991 Inventor: Nakayama, ;, , , --> Nakayama5028560, Method for forming a thin layer on a semiconductor substrate Issued on: 07/02/1991 Inventor: Tsukamoto, et al.5057463, Thin oxide structure and method Issued on: 10/15/1991 Inventor: Bryant, et al.5174881Apparatus for forming a thin film on surface of semiconductor substrate Issued on: 12/29/1992 Inventor: Iwasaki, et al. Foreign Patent References
International ClassesH01L 2131H01L 21469 |