Patent ReferencesCapping free metal silicide integrated process Diffusion resistor structure with silicided contact areas, and methods of fabrication thereof Polysilicon defined diffused resistor Semiconductor device and process of producing the same Metal oxide semiconductor device with localized laterally doped channel Method of manufacturing a highly latchup-immune CMOS I/O structure Method for manufacturing semiconductor device ESD protection circuit Semiconductor component and method of manufacture Semiconductor device and its manufacturing method Patent #: 7939893 InventorsAssigneeApplicationNo. 12473074 filed on 05/27/2009US Classes:438/238Including passive device (e.g., resistor, capacitor, etc.)ExaminersPrimary: Pert, EvanAttorney, Agent or FirmInternational ClassH01L 21/8232AbstractSemiconductor devices are formed with reduced variability between close proximity resistors, improved end resistances, and reduced random dopant mismatch. Embodiments include ion implanting a dopant, such as B, at a relatively high dosage, e.g. about 4 to about 6 keV, and at a relatively low implant energy, e.g., about 1.5 to about 2E15/cm2.Other References
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