U.S. patents available from 1976 to present.
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Electronic apparatus and data sending/receiving method thereof

Patent 8103814 Issued on January 24, 2012. Estimated Expiration Date: Icon_subject February 29, 2028. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Burst broadcasting on a peripheral component interconnect bus
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Inventor: Ananthan, et al.

System and method for converting VXI bus cycles to PCI burst cycles
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Burst-configurable data bus
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Synchronous memory system with automatic burst mode switching as a function of the selected bus master
Patent #: 6457075
Issued on: 09/24/2002
Inventor: Koutsoures

Network interface with power conservation using dynamic clock control
Patent #: 6546496
Issued on: 04/08/2003
Inventor: Wang, et al.

Method and apparatus for improving processing throughput in a video graphics system
Patent #: 6771269
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DRAM supporting different burst-length accesses without changing the burst length setting in the mode register
Patent #: 6957308
Issued on: 10/18/2005
Inventor: Patel

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Inventor

Assignee

Application

No. 12039986 filed on 02/29/2008

US Classes:

710/110Bus master/slave controlling

Examiners

Primary: Misiura, Brian

Attorney, Agent or Firm

International Classes

G06F 13/00
G06F 13/14
G06F 1/00

Abstract

An electronic apparatus to allow data to be sent and received between a master unit and a slave unit through a peripheral component interconnect (PCI) bus is provided. Each of the master unit and the slave unit comprises a data interface having a plurality of pins through which request data is sent to and received from an external device, and additional pins through which size information of the request data is sent to and received from the external device. If the master unit sends address information and the size information of the request data to the slave unit through the plurality of pins and the additional pins, the slave unit processes data of an address corresponding to the received address information according to size corresponding to the size information.

Other References

  • Tanenbaum—“Hardware/Software Tradeoffs: A General Design Principle?”—3 pages dated Jan. 25, 1985.
  • PCI Express Base Specification Revision 1.0a; Apr. 15, 2003—428 pages.
  • PCI Local Bus Specification—Revision 2.3; Dated Mar. 29, 2002—328 pages.
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