Patent ReferencesVcc pump for CMOS imagers CMOS imager with storage capacitor Retrograde well structure for a CMOS imager CMOS imager with a self-aligned buried contact CMOS imager with selectively silicided gates Multi-layered gate for a CMOS imager Patent #: 6376868 InventorAssigneeApplicationNo. 11110874 filed on 04/21/2005US Classes:348/241Including noise or undesired signal reductionExaminersPrimary: Jerabek, Kelly LAttorney, Agent or FirmInternational ClassesH04N 5/217H04N 3/14 H04N 5/335 H01L 27/00 AbstractAn anti-eclipse circuit of an image pixel includes an output line for receiving a reset output signal from a pixel and a circuit coupled to the output line for detecting when a pixel reset voltage at a pixel output is below a predetermined level, and, in response, for increasing a reset voltage at the pixel output to a value above the predetermined level. The detecting and increasing circuit comprises a charge amplifier circuit for receiving the reset output signal at the output line and a voltage generating circuit coupled to the output line responsive to the output of the charge amplifier circuit.Field of SearchIncluding noise or undesired signal reductionDark current Using dummy pixels Defective pixel (e.g., signal replacement) With memory of defective pixels Combined image signal generator and general image signal processing Readout of solid-state image sensor considered or altered Photosensitive switching transistors or "static induction" transistors Including switching transistor and photocell at each pixel site (e.g., "MOS-type" image sensor) | |