Patent ReferencesCMOS LSI and VLSI chips having internal delay testing capability Phase locked loop having digitally controlled oscillator and pulse signal generator Digital delay circuit and method Oscillator for measuring on-chip delays Delay stabilization system for an integrated circuit Signal monitoring circuit for detecting asynchronous clock loss Circuit for measuring signal delays in synchronous memory elements Built-in self test method for measuring clock to out delays Programmable ring oscillator Built-in AC self test using pulse generators InventorsAssigneeApplicationNo. 12043368 filed on 03/06/2008US Classes:331/57RING OSCILLATORSExaminersPrimary: Kinkead, ArnoldAssistant: Tan, Richard Attorney, Agent or FirmInternational ClassH03K 3/03AbstractA ring oscillator includes a first logic block having a first input connected to a specific point along a delay path, a first output and a second output, and a second logic block having a first input connected to the first output of the first logic block, a second input connected to the second output of the first logic block, a third input connected to the end of the delay path, and a first output connected to the beginning of the delay path. The first logic block is arranged to alternately switch its first output and second output from logical HIGH to logical LOW, and vice versa, every time a rising edge is input into its first input. The second logic block is arranged to alternately select its first input and its second input every time a rising edge is input into its third input. | |