Patent ReferencesSemiconductor device and a memory system including a plurality of IC chips in a common package Low power multi-chip semiconductor memory device and chip enable method thereof Patent #: 7379380 InventorAssigneeApplicationNo. 11812840 filed on 06/22/2007US Classes:365/52HARDWARE FOR STORAGE ELEMENTSExaminersPrimary: Phan, TrongAttorney, Agent or FirmInternational ClassesG11C 5/00G11C 7/00 G11C 8/00 AbstractA semiconductor package for forming a Double Die Package (DDP) with a plurality of single chips includes: a buffer configured to buffer an external address to generate a row address which is defined only in a DDP mode; a column address control unit configured to replace the row address with a column address, which is defined only in the DDP mode, in a single chip mode; and a read operation control unit configured to output a bank read signal latched in an active bank in a read mode of the DDP, and to selectively activate a first address control signal and a second address control signal for activating a bank selected from the single chip or the DDP in response to the bank read signal.Field of SearchHARDWARE FOR STORAGE ELEMENTSHaving particular data buffer or latch Delay Plural blocks or banks Including particular address buffer or latch circuit arrangement Counting 365/233.13 365/233.12 365/233.1 | |