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US Patent 7373642 - Defining instruction extensions in a standard programming language
US Patent Issued on May 13, 2008
Estimated Patent Expiration Date:
July 29, 2023Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
Estimated Patent Expiration Date:
July 29, 2023Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.AbstractA method is provided for modifying a program written in a standard programming language so that when the program is compiled both an executable file is produced and an instruction is programmed into a programmable logic device of a processor system. The method includes identifying a critical code segment of a program, rewriting the critical code segment as a function, revising the program, and compiling the program. Revising the program includes designating the function as code to be compiled by an extension compiler and replacing the critical code segment of the program with a statement that calls the function. Compiling the program includes compiling the code with an extension compiler to produce a header file and the instruction for the programmable logic device. Compiling the program also includes using a standard compiler to compile the remainder of the program together with the header file to generate the executable file.Other References
| InventorsAssigneeApplicationNo. 10630542 filed on 07/29/2003US Classes:717/160, Including loop717/146, Including intermediate code717/150, Loop compiling717/159, Code restructuring717/131, Including analysis of program execution717/154, Including analysis of program710/200, ACCESS LOCKING717/151, Optimization714/38Of computer softwareField of Search717/159Code restructuringExaminersPrimary: Dam, Tuan Q.Assistant: Tecklu, Isaac Attorney, Agent or FirmUS Patent References4635261, On chip test system for configurable gate arraysIssued on: 01/06/1987 Inventor: Anderson , et al.4766569, Programmable logic array Issued on: 08/23/1988 Inventor: Turner , et al.4893311, CMOS implementation of a built-in self test input generator (BISTIG) Issued on: 01/09/1990 Inventor: Hunter, et al.5055997, System with plurality of processing elememts each generates respective instruction based upon portions of individual word received from a crossbar switch Issued on: 10/08/1991 Inventor: Sluijter, et al.5247689, Parallel digital processor including lateral transfer buses with interrupt switches to form bus interconnection segments Issued on: 09/21/1993 Inventor: Ewert5258668, Programmable logic array integrated circuits with cascade connections between logic modules Issued on: 11/02/1993 Inventor: Cliff, et al.5260610, Programmable logic element interconnections for programmable logic array integrated circuits Issued on: 11/09/1993 Inventor: Pedersen, et al.5260611, Programmable logic array having local and long distance conductors Issued on: 11/09/1993 Inventor: Cliff, et al.5274581, Look up table implementation of fast carry for adders and counters Issued on: 12/28/1993 Inventor: Cliff, et al.5274782, Method and apparatus for dynamic detection and routing of non-uniform traffic in parallel buffered multistage interconnection networks Issued on: 12/28/1993 Inventor: Chalasani, et al.5293489, Circuit arrangement capable of centralizing control of a switching network Issued on: 03/08/1994 Inventor: Furui, et al.5299317, Method and apparatus for simulating an interconnection network Issued on: 03/29/1994 Inventor: Chen, et al.5343406, Distributed memory architecture for a configurable logic array and method for using distributed memory Issued on: 08/30/1994 Inventor: Freeman, et al.5357152, Logic system of logic networks with programmable selected functions and programmable operational controls Issued on: 10/18/1994 Inventor: Jennings, III, et al.5361373, Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor Issued on: 11/01/1994 Inventor: Gilson5414377, Logic block with look-up table for configuration and memory Issued on: 05/09/1995 Inventor: Freidin5426378, Programmable logic device which stores more than one configuration and means for switching configurations Issued on: 06/20/1995 Inventor: Ong5436574, Universal logic module with arithmetic capabilities Issued on: 07/25/1995 Inventor: Veenstra5471628, Multi-function permutation switch for rotating and manipulating an order of bits of an input data byte in either cyclic or non-cyclic mode Issued on: 11/28/1995 Inventor: Phillips, et al.5488612, Method and apparatus for field testing field programmable logic arrays Issued on: 01/30/1996 Inventor: Heybruck5517627, Read and write data aligner and method Issued on: 05/14/1996 Inventor: Petersen5535406, Virtual processor module including a reconfigurable programmable matrix Issued on: 07/09/1996 Inventor: Kolchinsky5619665, Method and apparatus for the transparent emulation of an existing instruction-set architecture by an arbitrary underlying instruction-set architecture Issued on: 04/08/1997 Inventor: Emma5636224, Method and apparatus for interleave/de-interleave addressing in data communication circuits Issued on: 06/03/1997 Inventor: Voith, et al.5652875, Implementation of a selected instruction set CPU in programmable hardware Issued on: 07/29/1997 Inventor: Taylor5682493, Scoreboard table for a counterflow pipeline processor with instruction packages and result packages Issued on: 10/28/1997 Inventor: Yung, et al.5684980, FPGA virtual computer for executing a sequence of program instructions by successively reconfiguring a group of FPGA in response to those instructions Issued on: 11/04/1997 Inventor: Casselman5696956, Dynamically programmable reduced instruction set computer with programmable processor loading on program number field and program number register contents Issued on: 12/09/1997 Inventor: Razdan, et al.5726584, Virtual high density programmable integrated circuit having addressable shared memory cells Issued on: 03/10/1998 Inventor: Freidin5742180, Dynamically programmable gate array with multiple contexts Issued on: 04/21/1998 Inventor: DeHon, et al.5784636, Reconfigurable computer architecture for use in signal processing applications Issued on: 07/21/1998 Inventor: Rupp5819064, Hardware extraction technique for programmable reduced instruction set computers Issued on: 10/06/1998 Inventor: Razdan, et al.5822588, System and method for checking the use of synchronization locks in a multi-threaded target program Issued on: 10/13/1998 Inventor: Sterling, et al.5847578, Programmable multiplexing input/output port Issued on: 12/08/1998 Inventor: Noakes, et al.5850564, Scalable multiple level tab oriented interconnect architecture Issued on: 12/15/1998 Inventor: Ting, et al.5920202, Configurable logic element with ability to evaluate five and six input functions Issued on: 07/06/1999 Inventor: Young, et al.5926036, Programmable logic array circuits comprising look up table implementation of fast carry adders and counters Issued on: 07/20/1999 Inventor: Cliff, et al.5956518, Intermediate-grain reconfigurable processing device Issued on: 09/21/1999 Inventor: DeHon, et al.5963050, Configurable logic element with fast feedback paths Issued on: 10/05/1999 Inventor: Young, et al.5977793, Programmable logic device with hierarchical interconnection resources Issued on: 11/02/1999 Inventor: Reddy, et al.5982195, Programmable logic device architectures Issued on: 11/09/1999 Inventor: Cliff, et al.5986465, Programmable logic integrated circuit architecture incorporating a global shareable expander Issued on: 11/16/1999 Inventor: Mendel5999734, Compiler-oriented apparatus for parallel compilation, simulation and execution of computer programs and hardware models Issued on: 12/07/1999 Inventor: Willis, et al.6092174, Dynamically reconfigurable distributed integrated circuit processor and method Issued on: 07/18/2000 Inventor: Roussakov6167502, Method and apparatus for manifold array processing Issued on: 12/26/2000 Inventor: Pechanek, et al.6219628, System and method for configuring an instrument to perform measurement functions utilizing conversion of graphical programs into hardware implementations Issued on: 04/17/2001 Inventor: Kodosky, et al.6237079, Coprocessor interface having pending instructions queue and clean-up queue and dynamically allocating memory Issued on: 05/22/2001 Inventor: Stoney6292388, Efficient and robust random access memory cell suitable for programmable logic configuration control Issued on: 09/18/2001 Inventor: Camarota6343337, Wide shifting in the vector permute unit Issued on: 01/29/2002 Inventor: Dubey, et al.6353841, Reconfigurable processor devices Issued on: 03/05/2002 Inventor: Marshall, et al.6374403, Programmatic method for reducing cost of control in parallel processes Issued on: 04/16/2002 Inventor: Darte, et al.6415424, Multiprocessor system with a high performance integrated distributed switch (IDS) controller Issued on: 07/02/2002 Inventor: Arimilli, et al.6418045, Efficient and robust random access memory cell suitable for programmable logic configuration control Issued on: 07/09/2002 Inventor: Camarota6426648, Carry lookahead for programmable logic array Issued on: 07/30/2002 Inventor: Rupp6557092, Programmable ALU Issued on: 04/29/2003 Inventor: Callen6622233, Hypercomputer Issued on: 09/16/2003 Inventor: Gilson6633181, Multi-scale programmable array Issued on: 10/14/2003 Inventor: Rupp6698015, Apparatus and method for improving performance of critical code execution Issued on: 02/24/2004 Inventor: Moberg , et al.6721884, System for executing computer program using a configurable functional unit, included in a processor, for executing configurable instructions having an effect that are redefined at run-time Issued on: 04/13/2004 Inventor: De Oliveira Kastrup Pereira, et al.6732354, Method, system and software for programming reconfigurable hardware Issued on: 05/04/2004 Inventor: Ebeling, et al.6744274, Programmable logic core adapter Issued on: 06/01/2004 Inventor: Arnold, et al.6795900, Method and system for storing data at input/output (I/O) interfaces for a multiprocessor system Issued on: 09/21/2004 Inventor: Miller, et al.6799236, Methods and apparatus for executing code while avoiding interference Issued on: 09/28/2004 Inventor: Dice, et al.6817013, Program optimization method, and compiler using the same Issued on: 11/09/2004 Inventor: Tabata, et al.6831690, Electrical sensing apparatus and method utilizing an array of transducer elements Issued on: 12/14/2004 Inventor: John, et al.6857110, Design methodology for merging programmable logic into a custom IC Issued on: 02/15/2005 Inventor: Rupp, et al.6874110, Apparatus and method for self testing programmable logic arrays Issued on: 03/29/2005 Inventor: Camarota6883084, Reconfigurable data path processor Issued on: 04/19/2005 Inventor: Donohoe6954845, Reconfigurable instruction set computing Issued on: 10/11/2005 Inventor: Arnold, et al.6968544, Method for transformation of interface definitions and intermediate format tables thereof Issued on: 11/22/2005 Inventor: Schneider6996709, Method for configuring a configurable hardware block by configuring configurable connections provided around a given type of subunit Issued on: 02/07/2006 Inventor: Arnold, et al.7000211, System and method for efficiently mapping heterogeneous objects onto an array of heterogeneous programmable logic resources Issued on: 02/14/2006 Inventor: Arnold7062520, Multi-scale programmable array Issued on: 06/13/2006 Inventor: Rupp7086047, Determining hardware generated by high level language compilation through loop optimizations Issued on: 08/01/2006 Inventor: Edwards, et al.7178062Methods and apparatus for executing code while avoiding interference Issued on: 02/13/2007 Inventor: Dice Foreign Patent References
International ClassG06F 9/44 |
