High performance flip chip package
Power semiconductor package and method for making the same
High performance multi-chip flip chip package
Array waveguide grating and method of manufacture thereof
Stacked intelligent power module package
Lead frame, semiconductor device and manufacturing method thereof, circuit board and electronic equipment
Thin, small-sized power semiconductor package
ApplicationNo. 11326987 filed on 01/05/2006
US Classes:438/123, Lead frame438/111, Using strip lead frame257/666, LEAD FRAME257/673, With bumps on ends of lead fingers to connect to semiconductor257/676With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for LED)
ExaminersPrimary: Picardat, Kevin M.
Attorney, Agent or Firm
International ClassH01L 21/00
AbstractA method for making a semiconductor die package is disclosed. In some embodiments, the method includes using a leadframe structure including at least one lead structure having a lead surface. A semiconductor die having a first surface and a second surface is attached to the leadframe structure. The first surface of the semiconductor die is substantially planar to the lead surface and the second surface of the semiconductor die is coupled to the leadframe structure. A layer of conductive material is formed on the lead surface and the first surface of the semiconductor die to electrically couple the at least one lead structure to the semiconductor die.
Field of SearchUsing strip lead frame
With bumps on ends of lead fingers to connect to semiconductor
With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for LED)