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US Patent 7356424 - Diagnostic compiler for pipeline analog-to-digital converter, method of compiling and test system employing the same

US Patent Issued on April 8, 2008
Estimated Patent Expiration Date: Icon_subject September 26, 2023Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
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Abstract

The present invention is directed to a diagnostic compiler for use with a pipeline analog-to-digital converter (ADC) having code sequences corresponding to stages thereof. In one embodiment, the diagnostic compiler includes a transition locator configured to determine transition locations for the code sequences. The diagnostic compiler also includes a characteristics indicator coupled to the transition locator and configured to provide at least one characteristic of the ADC based on the transition locations.

Other References

  • Bohan; A2D Converter Testing; Texas Instruments, Inc., Revision 1.2; Sep. 2000; pp. 1-132.
  • Bohan; Modeling converter mismatch, superposition and linearity errors; Engineering Technology, TI Technical Journal; Nov.-Dec. 1996; pp. 1-12.

Inventor

Assignee

Application

No. 10672609 filed on 09/26/2003

US Classes:

702/86, Linearization of measurement341/118, CONVERTER COMPENSATION341/120, CONVERTER CALIBRATION OR TESTING703/2, MODELING BY MATHEMATICAL EXPRESSION703/13, SIMULATING ELECTRONIC DEVICE OR ELECTRICAL SYSTEM703/14, Circuit simulation703/17, Event-driven714/1, Reliability and availability341/140, Linearization (e.g., nonlinear transfer characteristic compensates for nonlinear transducer)713/401, Using delay324/537, Of individual circuit component or element341/163, Recirculating341/161, Acting sequentially714/32, Particular stimulus creation341/155, Analog to digital conversion341/156, Coarse and fine conversions717/149For a parallel or multiprocessor system

Field of Search

341/118, CONVERTER COMPENSATION341/120, CONVERTER CALIBRATION OR TESTING341/140, Linearization (e.g., nonlinear transfer characteristic compensates for nonlinear transducer)702/85, CALIBRATION OR CORRECTION SYSTEM702/86, Linearization of measurement702/90, Error due to component compatibility702/182, Performance or efficiency evaluation702/183, Diagnostic analysis714/1, Reliability and availability717/104, Modeling703/2, MODELING BY MATHEMATICAL EXPRESSION703/13, SIMULATING ELECTRONIC DEVICE OR ELECTRICAL SYSTEM703/14, Circuit simulation703/15, Including logic703/16, Event-driven703/17, Event-driven703/19, Timing703/20, Target device703/21Computer or peripheral device

Examiners

Primary: Cosimano, Edward R.

Attorney, Agent or Firm

US Patent References

2839744, 3156899, 3349195, 3354452, 5712633, Conversion characteristic test circuit for analog/digital converter and method thereof
Issued on: 01/27/1998
Inventor: Bae
5995035, Cyclic analog-to-digital converter that reduces the accumulation of offset errors
Issued on: 11/30/1999
Inventor: Signell, et al.
6028546, Pipeline analog-to-digital conversion that reduces the accumulation offset errors
Issued on: 02/22/2000
Inventor: Signell, et al.
6037891, Low power serial analog-to-digital converter
Issued on: 03/14/2000
Inventor: Griph
6074426, Method for automatically generating behavioral environment for model checking
Issued on: 06/13/2000
Inventor: Baumgartner, et al.
6211804, Using single lookup table to correct differential non-linearity errors in an array of A/D converters
Issued on: 04/03/2001
Inventor: Kaplinsky
6320530, Recycling A/D converter
Issued on: 11/20/2001
Inventor: Horie
6476741, Method and system for making optimal estimates of linearity metrics of analog-to-digital converters
Issued on: 11/05/2002
Inventor: Cherubal, et al.
6553514, Digital circuit verification
Issued on: 04/22/2003
Inventor: Baumgartner, et al.
6734818, Digital cancellation of D/A converter noise in pipelined A/D converters
Issued on: 05/11/2004
Inventor: Galton
7006028Digital background cancellation of digital to analog converter mismatch noise in analog to digital converters
Issued on: 02/28/2006
Inventor: Galton

Foreign Patent References

  • 58-75920 JP 05/01/1983

International Classes

H03M 1/10
H03M 1/06
H03M 1/00
G06F 17/00

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