Electrostatic discharge protection circuit
Integrated circuit I/O buffer with series P-channel and floating well
Electrostatic discharge circuit
ESD-protection device with active R-C coupling to gate of large output transistor Patent #: 6552583
ApplicationNo. 10986771 filed on 11/15/2004
US Classes:327/112, Push-pull327/437, Complementary metal-oxide semiconductor (CMOS)327/576, Complementary transistors361/56, Voltage responsive326/86, Bus driving439/248Connector including housing or panel to support holder
ExaminersPrimary: Tra, Quan
Assistant: Englund, Terry L.
Attorney, Agent or Firm
International ClassesH02H 3/22
AbstractThe buffer circuit includes pull up and pull down circuits configured to selectively pull up and pull down, respectively, a voltage of an put/output pad. The pull up and pull down circuits are connected to separate power supply lines such that a current path from the input/output pad to the pull down circuit through the pull up circuit does not exist when electrostatic discharge is received at the input/output pad.