Patent 7136068 Issued on November 14, 2006. Estimated Expiration Date: April 7, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
A method and apparatus which includes a graphics accelerator, circuitry responsive to pixel texture coordinates to select texels and generate therefrom a texture value for any pixel the color of which is to be modified by a texture, and a cache for texels for use by the circuitry to generate texture value for any pixel.
Other References
Igehy, H., Eldridge, M., Proudfoot, K., “Prefetching in a Texture Cache Architecture”, Proceedings of the 1998 EUROGRAPHICS/SIGGRAPH Workshop on Graphics Hardware, 1998, pp. 133-142.
Alan Norton et al.; “Clamping: A Method of Antialiasing Textured Surfaces by Bandwidth Limiting in Object Space,” Computer Graphics, vol. 16, No. 3 (Jul., 1982), pp. 1-8.
Nobuyuki Yagi et al.; “A Programmable Video Signal Multi-Processor for HDTV Signals,” IEEE, (1993), pp. 1754-1757.
Graham J. Dunnett et al.; “The Image Chip for High Performance 3D Rendering,” IEEE, (Nov., 1992) pp. 41-52.
James E. Dudgeon, et al; “Algorithms for Graphics Texture Mapping,” IEEE, (1991), pp. 613-617.
Akira Yamazaki et al.; “A Concurrent Operating CDRAM for Low Cost Multi-Media,” 1993 Symposium on VLSI Circuits—Digest of Technical Papers, (May 19-21, 1993), Kyoto, Japan, pp. 61-62.
Dave Bursky; “Combination DRAM-SRAM Removes Secondary Caches,” Electronic Design, (Jan. 23, 1992), pp. 39-40, 42-43.
John Poulton et al.; “Breaking the Frame-Buffer Bottleneck with Logic Enhanced Memories,” IEEE Computer Graphics & Applications, (Nov., 1992), pp. 65-74.
Michael Deering et al.; “The Triangle Processor and Normal Vector Shader: A VLSI System for High Performance Graphics,” Computer Graphics, vol. 22, No. 4, (Aug., 1988), pp. 21-30.
David Kirk et al.; “The Rendering Architecture of the DN10000VS,” Computer Graphics, vol. 24, No. 4 (Aug. 1990), pp. 299-307.
Forrest Norrod et al.; “An Advanced VSLI Chip Set for Very-High-Speed Graphics Rendering,” Conference Proceedings—NCGA '91 Conference & Exposition, (Apr. 22-25, 1991, Chicago), pp. 1-10.
A.M. Kovalev et al.; “Computer Systems for Image Analysis and Synthesis—Increasing the Quality of Texture Mapping onto Planar Surfaces,” Optoelectronics, Instrumentation and Data Processing, No. 3, 1991, pp. 3-10.
Adrian Sfarti et al.; “Method for Filling Shaded, Textured z-Buffered Polygons,” 13 pages. (undated).
Intel Computers, “i860™ 64-Bit Microprocessor Simulator and Debugger Reference Manual,” Version 3, Jan. 1990, 167 pages.
Larry J. Thayer; “Advanced Workstation-Graphics Hardware Features,” Conference Proceedings—NCGA 1990, (pp. 309-315).
Williams, T., “80860 May Force Rethinking of Graphics Systems Architectures,” Computer Design, May 1, 1989
1860 64-Bit Microprocessor, Preliminary Data Sheet, Oct. 1989.