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US Patent 7125751 - Semiconductor device and method for the fabrication thereof grinding frame portion such that plural electrode constituent portions
US Patent Issued on October 24, 2006
Estimated Patent Expiration Date:
January 26, 2025Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
Estimated Patent Expiration Date:
January 26, 2025Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.AbstractDisclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other. | InventorsAssigneeApplicationNo. 11042163 filed on 01/26/2005US Classes:438/123, Lead frame438/124, And encapsulating438/126, And encapsulating438/692, Simultaneous (e.g., chemical-mechanical polishing, etc.)257/690With contact or leadField of Search438/123, Lead frame438/124, And encapsulating438/126, And encapsulating438/692Simultaneous (e.g., chemical-mechanical polishing, etc.)ExaminersPrimary: Brewster, William M.Attorney, Agent or FirmUS Patent References4722765, Process for preparing printed circuitsIssued on: 02/02/1988 Inventor: Ambros , et al.4961105, Arrangement of a semiconductor device for use in a card Issued on: 10/02/1990 Inventor: Yamamoto5656550, Method of producing a semicondutor device having a lead portion with outer connecting terminal Issued on: 08/12/1997 Inventor: Tsuji, et al.6084291Tape carrier for TAB, integrated circuit device, a method of making the same, and an electronic device Issued on: 07/04/2000 Inventor: Fujimori Foreign Patent References
International ClassesH01L 21/44H01L 21/48 H01L 21/50 H01L 21/302 H01L 21/461 |
