U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Semiconductor device and method for the fabrication thereof grinding frame portion such that plural electrode constituent portions

Patent 7125751 Issued on October 24, 2006. Estimated Expiration Date: Icon_subject January 26, 2025. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Process for preparing printed circuits
Patent #: 4722765
Issued on: 02/02/1988
Inventor: Ambros ,   et al.

Arrangement of a semiconductor device for use in a card
Patent #: 4961105
Issued on: 10/02/1990
Inventor: Yamamoto

Method of producing a semicondutor device having a lead portion with outer connecting terminal
Patent #: 5656550
Issued on: 08/12/1997
Inventor: Tsuji, et al.

Tape carrier for TAB, integrated circuit device, a method of making the same, and an electronic device Patent #: 6084291
Issued on: 07/04/2000
Inventor: Fujimori

Inventors

Assignee

Application

No. 11042163 filed on 01/26/2005

US Classes:

438/123, Lead frame438/124, And encapsulating438/126, And encapsulating438/692, Simultaneous (e.g., chemical-mechanical polishing, etc.)257/690With contact or lead

Examiners

Primary: Brewster, William M.

Attorney, Agent or Firm

Foreign Patent References

  • 11-186301 JP 07/01/1999
  • 11-195733 JP 07/01/1999

International Classes

H01L 21/44
H01L 21/48
H01L 21/50
H01L 21/302
H01L 21/461

Abstract

Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.

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