Sublithographic contact structure, in particular for a phase change memory cell, and fabrication process thereof

Patent 7122824 Issued on October 17, 2006. Estimated Expiration Date:

January 13, 2024. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

Method of making chalogenide memory device
Patent #: 5789277
Issued on: 08/04/1998
Inventor: Zahorik, et al.

Method of making small pores defined by a disposable internal spacer for use in chalcogenide memories
Patent #: 5814527
Issued on: 09/29/1998
Inventor: Wolstenholme, et al.

Small electrode for a chalcogenide switching device and method for fabricating same
Patent #: 5952671
Issued on: 09/14/1999
Inventor: Reinberg, et al.

Method of making memory cell incorporating a chalcogenide element
Patent #: 5970336
Issued on: 10/19/1999
Inventor: Wolstenholme, et al.

Contact structure and memory element incorporating the same Patent #: 6031287
Issued on: 02/29/2000
Inventor: Harshfield

Inventors

Assignee

STMicroelectronics S.r.l.

Application

No. 10756195 filed on 01/13/2004

US Classes:

257/2, Bulk effect switching in amorphous material257/3, With means to localize region of conduction (e.g., "pore" structure)257/4, With specified electrode composition or configuration438/95, Chalcogen (i.e., oxygen (O), sulfur (S), selenium (Se), tellurium (Te)) containing438/5, INCLUDING CONTROL RESPONSIVE TO SENSED CONDITION438/238, Including passive device (e.g., resistor, capacitor, etc.)257/734, COMBINED WITH ELECTRICAL CONTACT OR LEAD438/50, Physical stress responsive438/618, Contacting multiple semiconductive regions (i.e., interconnects)438/243, Trench capacitor257/536, Including resistive element257/296, Insulated gate capacitor or insulated gate transistor combined with capacitor (e.g., dynamic memory cell)438/102, HAVING SELENIUM OR TELLURIUM ELEMENTAL SEMICONDUCTOR COMPONENT365/200, Bad bit257/246Phase structure (e.g., doping variations to provide asymmetry for 2-phase operation; more than four phases or "electrode per bit")

Examiners

Primary: Pham, Thanhha

Attorney, Agent or Firm

Foreign Patent References

WO 00/57498 WO 09/01/2000
WO 02/09206 WO 01/01/2002

International Class

H01L 47/00

Abstract

A contact structure for a PCM device is formed by an elongated formation having a longitudinal extension parallel to the upper surface of the body and an end face extending in a vertical plane. The end face is in contact with a bottom portion of an active region of chalcogenic material so that the dimensions of the contact area defined by the end face are determined by the thickness of the elongated formation and by the width thereof.

Other References

U.S. Appl. No. 09/276,273, filed Mar. 25, 1999, Klersy.
Palun, L., et al., “Fabrication of Single Electron Devices by Hybrid (E-Beam/DUV) Lithography,” Microelectronic Engineering 53:167-170, 2000.