U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Semiconductor device

Patent 7079443 Issued on July 18, 2006. Estimated Expiration Date: Icon_subject August 1, 2023. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Pumped wordlines
Patent #: 5410508
Issued on: 04/25/1995
Inventor: McLaury

Row decoder/driver circuit for determining non selected wordlines and for driving non-selected wordlines to a potential less than the lowest potential of the digit lines
Patent #: 5636175
Issued on: 06/03/1997
Inventor: McLaury

Dual strobed negative pumped wordlines for dynamic random access memories
Patent #: 5650976
Issued on: 07/22/1997
Inventor: McLaury

Dual strobed negative pumped worldlines for dynamic random access memories
Patent #: 5926433
Issued on: 07/20/1999
Inventor: McLaury

Nonvolatile semiconductor memory Patent #: 5973963
Issued on: 10/26/1999
Inventor: Sugawara

Inventors

Application

No. 10631752 filed on 08/01/2003

US Classes:

365/230.06, Particular decoder or driver circuit365/189.11, Including level shift or pull-up circuit365/194, Delay365/196, Sense/inhibit365/189.09, Including reference or bias voltage generator365/185.23Drive circuitry (e.g., word line driver)

Examiners

Primary: Tran, Andrew Q.

Attorney, Agent or Firm

Foreign Patent References

  • 1-260848 JP 10/01/1989
  • 2-73593 JP 03/01/1990
  • 2-235368 JP 09/01/1990
  • 3-173465 JP 07/01/1991
  • 4-130766 JP 05/01/1992
  • 5-217373 JP 08/01/1993
  • 5-274876 JP 10/01/1993
  • 6-204406 JP 07/01/1994
  • 6-215568 JP 08/01/1994
  • 7-307091 JP 11/01/1995
  • 9-55084 JP 02/01/1997
  • 9-134591 JP 05/01/1997
  • 9-161481 JP 06/01/1997
  • 2000-30437 JP 01/01/2000
  • 1994-0002859 KR 04/01/1994

International Class

G11C 8/08

Abstract

A semiconductor device includes a word line drive circuit for resetting the word line by driving the word line connected to a memory cell and is constituted so as to switch a reset level of the word line drive circuit, which is set at the time of the reset operation of the word line, between a first potential such as a ground potential and a second potential such as a negative potential. Further, a semiconductor device including a memory cell array formed by arranging a plurality of memory cells and a word line reset level generating circuit for generating a negative potential makes it possible to vary the amount of a current supply of the word line reset level generating circuit when non-selected word lines are set to a negative potential by applying the output of the word line reset level generating circuit to the non-selected word lines, and varies the amount of the current supply of the negative potential in accordance with the operation of the memory cell array. Furthermore, in a semiconductor device including a plurality of power source circuits each having an oscillation circuit and a capacitor, for driving the capacitor by the oscillation signal outputted by the oscillation circuit, at least a part of these power source circuits shares in common the oscillation circuit, and different capacitors are driven by the oscillation signal outputted from the common oscillation circuit.

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