Patent ReferencesRecovery of cached data from a malfunctioning CPU Scheme for error handling in a computer system Method and apparatus for maintaining and retrieving live data in a posted write cache in case of power failure Method for transferring data between two devices that insures data recovery in the event of a fault Method of controlling data transfer and a safe shutdown in a hierarchical cache system during power cut-off Method and apparatus for storing computer data after a power failure Computer system and method for obtaining memory check points and recovering from faults using the checkpoints and cache flush operations Patent #: 5845326 InventorsAssigneeApplicationNo. 10179113 filed on 06/25/2002US Classes:714/15, State recovery (i.e., process or data file)711/135, Cache flushing711/138, Cache bypassing714/24, Safe shutdown714/755, Double encoding codes (e.g., product, concatenated)714/5, Of memory or peripheral subsystem711/162, Backup713/324, By shutdown of only part of system711/144, Cache status data bit711/133, Entry replacement strategy711/119Multiple cachesExaminersPrimary: Beausoliel, RobertAssistant: Guyton, Philip Attorney, Agent or FirmInternational ClassG06F 11/00AbstractIn a storage system including a write-back cache, dirty data can be flushed from the cache while a controller continues to service host I/O requests. A controller is capable of flushing all the dirty data in the cache to a storage device in response to an indication to do so, such as an indication of impending failure. The controller is further capable of responding to I/O requests from the host during the flushing of the dirty data. In particular, the controller is capable of responding to write requests from the host system by storing data on the storage device during the flushing of the dirty data. | |