Mapping of hosts to logical storage units and data storage ports in a data processing system
Patent 7051182 Issued on May 23, 2006. Estimated Expiration Date: September 5, 2023. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
711/202, Address mapping (e.g., conversion, translation)711/153, Shared memory partitioning709/213, MULTICOMPUTER DATA TRANSFERRING VIA SHARED MEMORY709/228, Session/connection parameter setting709/229, Network resources access controlling379/245, Identification714/798, Error detection for synchronization control370/321, Time division (TDMA)370/438, Using a separate control line or bus for access control382/166, Compression of color images370/394, Sequencing or resequencing of packets to insure proper output sequence order714/6, Redundant stored data accessed (e.g., duplicated data, error correction coded data, or other parity-type data)709/231, Computer-to-computer data streaming709/208, MASTER/SLAVE COMPUTER CONTROLLING709/249, MULTIPLE NETWORK INTERCONNECTING710/37, Access dedication711/122, Hierarchical caches711/112, Direct access storage device (DASD)725/115, Data storage or retrieval370/396, Distributed switching709/245, COMPUTER-TO-COMPUTER DATA ADDRESSING711/118, Caching711/114, Arrayed (e.g., RAIDs)707/3, Query processing (i.e., searching)370/254, NETWORK CONFIGURATION DETERMINATION711/147, Shared memory area711/170, Memory configuring709/216, Accessing another computer's memory709/219, Accessing a remote server714/15, State recovery (i.e., process or data file)370/216, FAULT RECOVERY709/220, NETWORK COMPUTER CONFIGURING714/758, Error correcting code with additional error detection code (e.g., cyclic redundancy character, parity)714/5, Of memory or peripheral subsystem709/227, COMPUTER-TO-COMPUTER SESSION/CONNECTION ESTABLISHING709/217, REMOTE DATA ACCESSING709/200, MISCELLANEOUS370/469, Processing multiple layer protocols707/101, Manipulating data structure (e.g., compression, compaction, compilation)710/31, Transfer direction selection370/422, Centralized switching707/10, Distributed or remote access709/223, COMPUTER NETWORK MANAGING370/235, Flow control of data transmission through a network709/203, Client/server709/211, Master accessing slave storage711/152, Memory access blocking370/352, Combined circuit switching and packet switching711/5, For multiple memory modules (e.g., banks, interleaved memory)711/164With password or key
An apparatus has host ports for coupling hosts to data storage devices. The data storage devices are configured into logical storage units, and the apparatus is programmed with a mapping of the hosts to respective logical storage units. The apparatus decodes a host identifier and a logical storage unit specification from each data access request received at each host port, and determines whether or not the decoded host identifier and logical storage unit specification are in conformance with the mapping in order to permit or deny data access of the logical storage unit through the host port. For example, the apparatus includes a switch for routing the data storage access requests from the host ports to ports that provide access to the data storage, and a set of logical volumes of storage are accessible from each of the ports that provide access to the data storage.
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