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US Patent 7045851 - Nonvolatile memory device using semiconductor nanocrystals and method of forming same

US Patent Issued on May 16, 2006
Estimated Patent Expiration Date: Icon_subject June 20, 2023Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
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Abstract

A floating gate for a field effect transistor (and method for forming the same and method of forming a uniform nanoparticle array), includes a plurality of discrete nanoparticles in which at least one of a size, spacing, and density of the nanoparticles is one of templated and defined by a self-assembled material.

Other References

  • Sandip Tiwari et al., “Volatile and Non-Volatile Memories in Silicon with Nano-Crystal Storage”, IEEE, 1995, pp. 20.4.1-20.4.4, Dec. 1995.
  • Ya-Chin King et al., “MOS Memory Using Germanium Nanocrystals Formed by Thermal Oxidation of Si1-xGex”, IEEE, 1998, pp. 5.3.1-5.3.4, Dec. 1998.
  • M. L. Ostraat et al., “Synthesis and characterization of aersol silicon nanocrystal nonvolatile floating-gate memory devices”, Applied Physics Letters, vol. 79, No. 3, Jul. 16, 2001, pp. 433-435.
  • S. Tiwari et al., “Small silicon memories: confinement, single-electron, and interface state considerations”, Appl. Phys. A 71, 403-414 (2000)/Digital Object Identifier (DOI), Sep. 6, 2000.
  • Sandip Tiwari et al., “A silicon nanocrystals based memory”, Appl. Phys. Lett. 68 (10), Mar. 4, 1996, pp. 1377-1379.
  • J. J. Welser et al., “Room Temperature Operation of a Quantum-Dot Flash Memory”, IEEE Electron Device Letters, vol. 18, No. 6, Jun. 1997, pp. 278-280.
  • Hussein I. Hanafi et al., “Fast and Long Retention-Time Nano-Crystal Memory”, IEEE Translations on Electron Devices, vol. 43, No. 9, Sep. 1996, pp. 1553-1558.
  • Paolo Pavan et al., “Flash Memory Cells-An Overview”, Proceedings of the IEEE, vol. 85, No. 8, Aug. 1997, pp. 1248-1271.
  • Ilgweon Kim et al., “Room Temperature Single Electron Effects in a Si Nano-Crystal Memory”, IEEE Electron Device Letters, vol. 20, No. 12, Dec. 1999, pp. 630-631.
  • Min She et al., “Modeling and Design Study of Nanocrystal Memory Devices”, Dept. of Electrical Engineering and Computer Sciences, University of California Berkeley, CA, pp. 139-140.
  • Tejal Desai, et al., “Nanoporous Anti-Fouling Silicon Membranes for Biosensor Applications,” Biosensors & Bioelectronics, vol. 15, 2000, pp. 453-462, Dec. 2000.
  • Guarini K.W., et al. “Process Integration of self-assembled polymer templates into silicon nanofabrication”, Journal of Vacuum Science and Technoloy. B, Miroelectronics and Nanometer Structures Processing, Measurement and Phenomena, American Institute of Physics, New York, NY, US, vol. 20, No. 6, Nov. 2002, pp. 2788-2792, XP012009632 ISSN: 1071-1023.
  • Guarini, K.W., et al. “Optimization of Diblock Copolymer Thin Film Self Assembly”, Advanced Materials, vol. 14, No. 18, Sep. 16, 2002, pp. 1290-1294, XP002303851 Wiley-VCH, Weinheim, DE, ISSN: 0935-9648.
  • Park Miri, et al. “Large area dense nanoscale patterning of arbitrary surfaces”, Applied Physics Letters, American Institute of Physics, New York, US, vol. 79, No. 2, Jul. 9, 2001, pp. 257-259, XP012029389 ISSN: 0003-6951.
  • Guarini, K.W., et al. “Nanoscale patterning using self-assembled polymers for semiconductor applications”, Journal of Vacuum Science and Technology, B. Microelectronics and Nanometer Structures Processing, Measurement and Phenomena, American Institute of Physics, New York, NY, US, vol. 19, No. 6, Nov. 2001, pp. 2784-2788, XP012009128 ISSN: 1071-1023.
  • Li, R.R., et al. “Dense arrays of ordered GaAs nanostructures by selective area growth on substrates patterned by block copolymer lithography”, Applied Physics Letters, American Institute of Physics, New York, US, vol. 76, No. 13, Mar. 27, 2000, pp. 1689-1691, XP012024907 ISSN: 0003-6951.
  • Harrison Christopher, et al. “Lithography with a mask of block copolymer microstructures”, Journal of Vacuum Science & Telechnology B: Microelectronics Processing and Phenomena, American Vacuum Society, New York, NY, US, vol. 16, No. 2, Mar. 1998, pp. 544-552, XP012006671 ISSN: 0734-211X.
  • Park, M., et al. “Block Copolymer Lithography: Periodic Arrays of about 10 to the 11th holes in 1 Square Centimeter”, Science, American Association for the Advancement of Science, US, vol. 276, May 30, 1997, pp. 1401-1404, XP002223276 ISSN: 0036-8075.
  • Ostraat, M.L., “Synthesis and characterization of aerosol silicon nanocrystal nonvolatile floating-gate memory sdevices”, Applied Physics Letters, American Institute of Physics, New York, US, vol. 79, No. 3, Jul. 16, 2001, pp. 433-435, XP012029871 ISSN: 0003-6951.
  • International Search Report dated Nov. 16, 2004.

Inventors

Application

No. 10465797 filed on 06/20/2003

US Classes:

257/315, With floating gate electrode257/316, With additional contacted control electrode257/17, With particular barrier dimension438/257, Having additional gate electrode surrounded by dielectric (i.e., floating gate)365/151, Molecular or atomic257/261, Junction gate region free of direct electrical connection (e.g., floating junction gate memory cell structure)423/348, Elemental silicon257/317With irregularities on electrode to facilitate charging or discharging of floating electrode

Field of Search

257/315, With floating gate electrode257/316, With additional contacted control electrode257/616, Containing germanium, Ge438/257Having additional gate electrode surrounded by dielectric (i.e., floating gate)

Examiners

Primary: Prenty, Mark V.

Attorney, Agent or Firm

US Patent References

4045302, Multilevel metallization process
Issued on: 08/30/1977
Inventor: Gibbs ,   et al.5714766, Nano-structure memory device
Issued on: 02/03/1998
Inventor: Chen, et al.5849215, Highly ordered nanocomposites via a monomer self-assembly in situ condensation approach
Issued on: 12/15/1998
Inventor: Gin, et al.5948470, Method of nanoscale patterning and products made thereby
Issued on: 09/07/1999
Inventor: Harrison, et al.6069380, Single-electron floating-gate MOS memory
Issued on: 05/30/2000
Inventor: Chou, et al.6090666, Method for fabricating semiconductor nanocrystal and semiconductor memory device using the semiconductor nanocrystal
Issued on: 07/18/2000
Inventor: Ueda, et al.6139713Method of manufacturing porous anodized alumina film
Issued on: 10/31/2000
Inventor: Masuda, et al.

Foreign Patent References

  • 1 256 986 EP 11/01/2002
  • 2001-233674 JP 08/01/2001

International Class

H01L 29/788

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