Abstract

An image processing apparatus is provided that includes a primary memory unit to buffer image data, a secondary memory unit to store the image data transferred from the primary memory unit, and a memory control unit that controls both memory units. The memory control unit transfers, if a plurality of items of image data are to be transferred, at least one of the items of image data divisionally from the primary memory unit to the secondary memory unit. When image data are transferred from the primary memory unit to the secondary memory unit, the memory control unit transfers a unit image either in a block or divisionally in multiple parts, and the memory control unit simultaneously transfers a plurality of images divisionally, the images being divided into varying numbers of parts so that each input and output of an image can evenly share the time of the secondary memory unit and a plurality of images can be efficiently transferred in parallel in a short time.

Other References

• U.S. Appl. No. 10/928,481, filed Aug. 30, 2004, Hattori et al.
• U.S. Appl. No. 10/327,908, filed Dec. 26, 2002, Obata et al.
• U.S. Appl. No. 10/637,690, filed Aug. 11, 2003, Shindoh et al.
• U.S. Appl. No. 10/692,792, filed Oct. 27, 2003, Kizaki et al.
• U.S. Appl. No. 10/694,062, filed Oct. 28, 2003, Kizaki et al.
• U.S. Appl. No. 09/461,738, filed Dec. 16, 1999, Motohashi et al.
• U.S. Appl. No. 09/731,724, filed Dec. 08, 2000, Michiie et al.
• U.S. Appl. No. 09/964,464, filed Sep. 28, 2001, Moteki et al.
• U.S. Appl. No. 10/053,548, filed Jan. 1, 2002, Moteki
• U.S. Appl. No. 10/183,499, filed Jun. 28, 2002, Obata et al.
• U.S. Appl. No. 10/997,870, filed Nov. 29, 2004, Michiie et al.
• U.S. Appl. No. 11/151,409, filed Jun. 14, 2005, Obata et al.
• U.S. Appl. No. 11/221,703, filed Sep. 9, 2005, Obata et al.
• U.S. Appl. No. 11/222,778, Sep. 12, 2005, Michiie et al.