CMOS-compatible integration of silicon-based optical devices with electronic devices

Patent 6968110 Issued on November 22, 2005. Estimated Expiration Date:

April 21, 2024. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

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Inventors

Application

No. 10828898 filed on 04/21/2004

US Classes:

385/131, Multilayer structure (mixture)257/431, Light385/125, Utilizing nonsolid core or cladding385/129PLANAR OPTICAL WAVEGUIDE

Examiners

Primary: Wille, Douglas A.

International Class

G02B006/10

Abstract

A conventional CMOS fabrication technique is used to integrate the formation of passive optical devices and active electro-optic devices with standard CMOS electrical devices on a common SOI structure. The electrical devices and optical devices share the same surface SOI layer (a relatively thin, single crystal silicon layer), with various required semiconductor layers then formed over the SOI layer. In some instances, a set of process steps may be used to simultaneously form regions in both electrical and optical devices. Advantageously, the same metallization process is used to provide electrical connections to the electrical devices and the active electro-optic devices.