Ultrathin form factor MEMS microphones and microspeakers
November 5, 2023. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod of making superhard mechanical microstructures Microelectromechanical structure and process of making same Microelectromechanical structure and process of making same Recessed etch RF micro-electro-mechanical switch Capacitive micromachined ultrasonic transducer arrays with reduced cross-coupling Process flow for ARS mover using selenidation wafer bonding after processing a media side of a rotor wafer Low cost electroless plating process for single chips and wafer parts and products obtained thereof Semiconductor device and method of manufacturing the same Systems and methods for sensing an acoustic signal using microelectromechanical systems technology Pressure transducer Patent #: 6732588 InventorsAssigneeApplicationNo. 10701860 filed on 11/05/2003US Classes:438/459, Thinning of semiconductor substrate438/455, BONDING OF PLURAL SEMICONDUCTOR SUBSTRATES438/50, Physical stress responsive438/52, Having cantilever element438/53, Having diaphragm element438/48, MAKING DEVICE OR CIRCUIT RESPONSIVE TO NONELECTRICAL SIGNAL438/464, With attachment to temporary support or carrier438/977, THINNING OR REMOVAL OF SUBSTRATE438/118, Including adhesive bonding step257/620, With peripheral feature due to separation of smaller semiconductor chip from larger wafer (e.g., scribe region, or means to prevent edge effects such as leakage current at peripheral chip separation area)73/170.13, Acoustic73/715, Diaphragm381/423, Specified diaphragm shape or structure313/293, DISCHARGING DEVICES WITH APERTURED ELECTRODE (E.G., GRID) INTERPOSED BETWEEN TWO ELECTRODES347/54, Drop-on-demand381/173, Piezoelectric or ferroelectric257/758Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit)ExaminersPrimary: Baumeister, B. WilliamAssistant: Anya, Igwe U. Attorney, Agent or FirmForeign Patent References
International ClassH01L021/46AbstractA process comprises reducing the thickness of a substrate carrying a plurality of devices, with at least certain of the devices having a micro-machined mesh. A carrier wafer is attached to the back side of the substrate and the fabrication of the devices is completed from the top side of the substrate. Thereafter the plurality of devices is singulated. Various alternative embodiments are disclosed which demonstrate that the thinning of the wafer may occur at different times during the process of fabricating the MEMS devices such as before the mesh is formed or after the mesh is formed. Additionally, the use of carrier wafers to support the thinned wafer enables process steps to be carried out on the side opposite from the side having the carrier wafer. The various alternative embodiments demonstrate that the side carrying the carrier wafer can be varied throughout the process.Other References
Field of SearchThinning of semiconductor substrateBONDING OF PLURAL SEMICONDUCTOR SUBSTRATES Physical stress responsive Having diaphragm element Having cantilever element MAKING DEVICE OR CIRCUIT RESPONSIVE TO NONELECTRICAL SIGNAL With attachment to temporary support or carrier THINNING OR REMOVAL OF SUBSTRATE | |
