Patent ReferencesThree-dimensional multi-chip pad array carrier Ball grid array packages for high speed applications Chip carrier modules with heat sinks attached by flexible-epoxy Method of constructing stacked packages Semiconductor device using a chip scale package Flip chip adaptor package for bare die Multi-chip device utilizing a flip chip and wire bond assembly Package having very thin semiconductor chip, multichip module assembled by the package, and method for manufacturing the same Interposer for separating stacked semiconductor chips mounted on a multi-layer printed circuit board Multichip module InventorAssigneeApplicationNo. 10681833 filed on 10/08/2003US Classes:257/686, Stacked arrangement257/701, Insulating material257/706, With heat sink257/712, With provision for cooling the housing or its contents257/659, WITH SHIELDING (E.G., ELECTRICAL OR MAGNETIC SHIELDING, OR FROM ELECTROMAGNETIC RADIATION OR CHARGED PARTICLES)257/660, With means to shield device contained in housing or package from charged particles (e.g., alpha particles) or highly ionizing radiation (i.e., hard X-rays or shorter wavelength)438/106, PACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTOR438/108, Flip-chip-type assembly438/109, Stacked array (e.g., rectifier, etc.)438/110, Making plural separate devices361/792, Plural contiguous boards438/122, Possessing thermal dissipation structure (i.e., heat sink)257/777, Chip mounted on chip361/702With cold plate or heat sinkExaminersPrimary: Flynn, Nathan J.Assistant: Forde , Remmon R. Attorney, Agent or FirmForeign Patent References
International ClassH01L023/02AbstractA semiconductor multi-package module has an inverted second package stacked over a first package, in which the stacked packages are electronically interconnected by wire bonds, and in which at least one of the packages is provided with an electrical shield. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die and having a shield, affixing an upper molded package including an upper substrate in inverted orientation onto an upper surface of the lower package, and forming z-interconnects between the upper and lower substrates. Where the shield is situated above the lower package substrate, the inverted upper package is affixed onto an upper surface of the shield.Field of SearchStacked arrangementMultiple housings Insulating material With heat sink With provision for cooling the housing or its contents Isolation of cooling means (e.g., heat sink) by an electrically insulating element (e.g., spacer) Heat dissipating element has high thermal conductivity insert (e.g., copper slug in aluminum heat sink) WITH SHIELDING (E.G., ELECTRICAL OR MAGNETIC SHIELDING, OR FROM ELECTROMAGNETIC RADIATION OR CHARGED PARTICLES) With means to shield device contained in housing or package from charged particles (e.g., alpha particles) or highly ionizing radiation (i.e., hard X-rays or shorter wavelength) Metallic housing or support Possessing thermal dissipation structure (i.e., heat sink) Assembly of plural semiconductive substrates each possessing electrical device Flip-chip-type assembly PACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTOR Making plural separate devices Stacked array (e.g., rectifier, etc.) | |