U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Low fatigue sensing method and circuit for ferroelectric non-volatile storage units

Patent 6885574 Issued on April 26, 2005. Estimated Expiration Date: Icon_subject October 24, 2022. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Method for reading and restoring data in a data storage element
Patent #: 5579257
Issued on: 11/26/1996
Inventor: Tai

Memory cell that can store data nonvolatily using a ferroelectric capacitor, and a semiconductor memory device including such a memory cell
Patent #: 5751627
Issued on: 05/12/1998
Inventor: Ooishi

Ferroelectric memory device and method for driving it Patent #: 6118688
Issued on: 09/12/2000
Inventor: Hirano, et al.

Inventors

Assignee

Application

No. 10281075 filed on 10/24/2002

US Classes:

365/145, Ferroelectric365/149Capacitors

Examiners

Primary: Lebentritt, Michael S.
Assistant: Le, Thong

Attorney, Agent or Firm

Foreign Patent References

  • 01 83 0667 EP 07/01/2002

International Class

G11C011/22

Abstract

A method of sensing a ferroelectric non-volatile information storage unit comprising two ferroelectric storage capacitors in mutually opposite polarization states, and a sensing circuit for actuating the method. The method comprises the steps of: making a voltage applied across the two storage capacitors substantially zero; starting from this condition, progressively increasing the voltage applied thereacross by supplying a prescribed current, until a first one of the two storage capacitors approaches a condition of polarization state reversal, thereby the voltage applied across said first storage capacitor starts to decrease with respect to the voltage applied across the second storage capacitor; and amplifying a voltage difference between the voltages applied across the two storage capacitors by making the voltage applied across the first storage capacitor substantially zero and the voltage applied across the second storage capacitor substantially equal to a non-zero voltage corresponding to a logic state opposite to a logic state corresponding to the zero voltage.

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