Patent ReferencesOn board self-calibration of analog-to-digital and digital-to-analog converters Charge pump amplifier Image processing device for correcting an offset of an image signal Photodetector array Correlated double sampling with up/down counter Low noise amplifier for passive pixel CMOS imager Active pixel sensor using CMOS technology with reverse biased photodiodes Analog signal sampler for imaging systems Image sensor with direct digital correlated sampling Capacitor array for a successive approximation register (SAR) based analog to digital (A/D) converter and method therefor Patent #: 6118400 InventorsApplicationNo. 09264501 filed on 03/08/1999US Classes:348/241, Including noise or undesired signal reduction348/302, X - Y architecture348/222.1, Combined image signal generator and general image signal processing250/208.1, Plural photosensitive image detecting element arrays341/172Using charge transfer devices (e.g., charge coupled devices, charge transfer by switched capacitances)ExaminersPrimary: Christensen, AndrewAssistant: Tran, Nhan Attorney, Agent or FirmInternational ClassesH04N005/217H04N005/228 H04N005/335 H01L027/00 H03M001/12 AbstractA CMOS imager includes an array of active pixel sensors, wherein each pixel is associated with a respective column in the array. The imager also includes multiple circuits for reading out values of pixels from the active sensor array. Each readout circuit can be associated with a respective pair of columns in the array and can include first and second sample-and-hold circuits. The first and second sample-and-hold circuits are associated, respectively, with first and second columns of pixels in the array. Each readout circuit also includes an operational amplifier-based charge sensing circuit that selectively provides an amplified differential output signal based on signals sampled either by the first sample-and-hold circuit or the second sample-and-hold circuit. The readout circuit also has an analog-to-digital converter for converting the differential output to a corresponding digital signal using a successive approximation technique. Use of the readout circuit can increase the parallel structure of the overall chip, thereby reducing the bandwidth which each readout circuit must be capable of handling.Other References
Field of SearchIncluding noise or undesired signal reductionCombined image signal generator and general image signal processing X - Y architecture Including switching transistor and photocell at each pixel site (e.g., "MOS-type" image sensor) Solid-state image sensor Plural photosensitive image detecting element arrays CONVERTER CALIBRATION OR TESTING Using charge transfer devices (e.g., charge coupled devices, charge transfer by switched capacitances) Using charge coupled devices or switched capacitances CONVERTER COMPENSATION With solid-state image detector | |