U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Method for configuring a single hardware I/O control block architecture for use with both mirrored and non-mirrored data transfers

Patent 6871238 Issued on March 22, 2005. Estimated Expiration Date: Icon_subject February 12, 2024. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

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Inventor

Assignee

Application

No. 10779416 filed on 02/12/2004

US Classes:

710/5, Input/Output command process710/14, Mode selection710/20, Concurrent Input/Output processing and data transfer714/1, Reliability and availability714/6, Redundant stored data accessed (e.g., duplicated data, error correction coded data, or other parity-type data)707/204, Archiving or backup711/100, STORAGE ACCESSING AND CONTROL711/114, Arrayed (e.g., RAIDs)711/161, Archiving711/162Backup

Examiners

Primary: Gaffin, Jeffrey
Assistant: Nguyen, Tan T.

Attorney, Agent or Firm

International Classes

G06F013/00
H04B001/74
H04L001/22
H05K010/00

Abstract

A single host adapter hardware I/O control block contains information used to specify a transfer of data from a host system to a first target device and in addition information that specifies whether the data is to be mirrored, and if so, optionally identifies a second target device on which the data is to be mirrored. After transferring the single hardware I/O control block to the host adapter integrated circuit, the host adapter integrated circuit determines whether the hardware I/O control block specifies a mirrored transaction. If a mirrored transaction is specified, the host adapter integrated circuit generates a second hardware I/O control block for the second target device using the information in the first hardware I/O control block. When the execution of both hardware I/O control blocks is complete, the host adapter integrated circuit provides a single completion notification to the host system.

Other References

  • “Preliminary Amendment” for U.S. patent Appl. entitled “A Hardware I/O Control Block Structure for Mirrored and Non-Mirrored Data Transfers,” of B. Arlen Young filed on Feb. 12, 2004 6 pages.
  • “Preliminary Amendment” for U.S. patent Appl. entitled “A Hardware I/O Control Block Array for Mirrored Data Transfers,” of B. Arlen Young filed on Feb. 12, 2004 6 pages.
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