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Spacer chalcogenide memory method and device

Patent 6830952 Issued on December 14, 2004. Estimated Expiration Date: Icon_subject September 4, 2023. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Grooved optical data storage device including a chalcogenide memory layer
Patent #: 4719594
Issued on: 01/12/1988
Inventor: Young ,   et al.

Method and apparatus for locating physical objects
Patent #: 5177563
Issued on: 01/05/1993
Inventor: Everett, et al.

Electrically erasable memory elements characterized by reduced current and improved thermal stability
Patent #: 5534712
Issued on: 07/09/1996
Inventor: Ovshinsky, et al.

Multibit single cell memory element having tapered contact
Patent #: 5687112
Issued on: 11/11/1997
Inventor: Ovshinsky

Method of making chalogenide memory device
Patent #: 5789277
Issued on: 08/04/1998
Inventor: Zahorik, et al.

Chalcogenide memory cell with a plurality of chalcogenide electrodes
Patent #: 5789758
Issued on: 08/04/1998
Inventor: Reinberg

Method of making small pores defined by a disposable internal spacer for use in chalcogenide memories
Patent #: 5814527
Issued on: 09/29/1998
Inventor: Wolstenholme, et al.

Three-dimensional container diode for use with multi-state material in a non-volatile memory cell
Patent #: 5831276
Issued on: 11/03/1998
Inventor: Gonzalez, et al.

Method for optimal crystallization to obtain high electrical performance from chalcogenides
Patent #: 5837564
Issued on: 11/17/1998
Inventor: Sandhu, et al.

Memory array having a multi-state element and method for forming such array or cells thereof
Patent #: 5869843
Issued on: 02/09/1999
Inventor: Harshfield

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Inventor

Application

No. 10654684 filed on 09/04/2003

US Classes:

438/95, Chalcogen (i.e., oxygen (O), sulfur (S), selenium (Se), tellurium (Te)) containing438/595, Having sidewall structure438/900, BULK EFFECT DEVICE MAKING438/597, To form ohmic contact to semiconductive material257/4With specified electrode composition or configuration

Examiners

Primary: Nelms, David C.
Assistant: Nguyen, Thinh

Attorney, Agent or Firm

Foreign Patent References

  • WO 0079539 WO 12/01/2000
  • WO 0145108 WO 06/01/2001

International Class

H01L 2100

Abstract

The present invention includes devices and methods to form memory cell devices including a spacer comprising a programmable resistive material alloy. Particular aspects of the present invention are described in the claims, specification and drawings.

Other References

  • Wicker, Guy et al., “Nonvolatile, High Density, High Performance Phase Change Memory,” Ovonyx, Inc., Troy MI, (Oct 23, 2001) 8 pages.
  • Ovonyx Non-Confidential paper entitled “Ovonic Unified Memory,” Dec 1999, pp. 1-80.
  • Axon Technologies Corporation paper: Technology Description, pp. 1-6.
  • Blake thesis, “Investigations of Ge2Te2Sb5 Chalcogenide Films for Use as an Analog Memory,” AFIT/GE/ENG/00M-04, Mar 2000, 121 pages.
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