Single ended output sense amplifier circuit with reduced power consumption and noise
July 8, 2022. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMemory circuit with improved data output control Disabling sense amplifier Multiplexing sense amplifier Synchronous output circuit Low-power read circuit and method for controlling a sense amplifier Circuit and method for setting the time duration of a write to a memory cell Power saving synchronization circuit and semiconductor storage device including the same Patent #: 5986967 InventorAssigneeApplicationNo. 10190917 filed on 07/08/2002US Classes:365/208, Semiconductors365/189.05, Having particular data buffer or latch365/203, Precharge365/196Sense/inhibitExaminersPrimary: Nguyen, Van ThuAssistant: Hur, J. H. Attorney, Agent or FirmInternational ClassesG11C 702G11C 710 G11C 712 AbstractA sense amplifier circuit for a memory cell includes a sense amplifier that is operable to be coupled to a memory cell via data lines, and including read bus complement and read bus true lines operative with a data output through which a data output signal is passed. An equalization circuit and enable circuit are operable with the sense amplifier. A control circuit is operable for disconnecting the data output from preferably the one of the read bus complement line and minimize unwanted transitions on the data output signal. | |
