Patent ReferencesSuppression of boron segregation for shallow source and drain junctions in semiconductors Deposition of super thin PECVD SiO2 in multiple deposition station system Process for forming PECVD undoped oxide with a super low deposition rate on a single state deposition Process for forming PECVD nitride with a very low deposition rate Method for forming an L-shaped spacer with a disposable organic top coating Semiconductor device having field effect transistors different in thickness of gate electrodes and process of fabrication thereof Combined gate cap or digit line and spacer deposition using HDP Method of forming graded thin films using alternating pulses of vapor phase reactants Patent #: 6534395 InventorsAssigneeApplicationNo. 10283844 filed on 10/30/2002US Classes:438/239, Capacitor438/595, Having sidewall structure438/724, Silicon nitride438/757, Silicon nitride438/787, Silicon oxide formation438/791Silicon nitride formationExaminersPrimary: Fourson, GeorgeAssistant: Estrada, Michelle Attorney, Agent or FirmInternational ClassH01L 218242AbstractA method of manufacturing a semiconductor device having a metal conducting layer is provided. A metal conducting layer pattern having the metal conducting layer is formed on a semiconductor substrate. A portion of the metal conducting layer is partially exposed on the semiconductor substrate. The semiconductor substrate having the metal conducting layer pattern is loaded into a reaction chamber. A first silicon source gas is flowed into the reaction chamber. A silicon oxide layer is formed on the semiconductor substrate having the metal conducting layer pattern by supplying a second silicon source gas and an oxygen source gas into the reaction chamber. | |