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US Patent 6775237 - Methods and apparatus for burst tolerant excessive bit error rate alarm detection and clearing

US Patent Issued on August 10, 2004
Estimated Patent Expiration Date: Icon_subject March 29, 2021Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
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Abstract

The excessive bit error rate detection algorithm operates in two modes: BURST mode and non-BURST mode. In non-BURST mode, an alarm state is entered if an error count exceeds a threshold within a set number of frames and exits the alarm state when the error count stays below a threshold for a set number of frames. In the BURST mode, the alarm state is not entered unless the error count exceeds the threshold two consecutive times and does not exit the alarm state unless the error rate remains below a threshold for two consecutive frame counts.

Other References

  • Bellcore document TR-NWT-000253 entitled “Synchronous optical network (SONET) Transport Systems: Common Generic Criteria”, Telecordia Technologies, GR-253-CORE, Issue 3, Sep. 2000.

Inventors

Assignee

Application

No. 09912086 filed on 03/29/2001

US Classes:

370/241, DIAGNOSTIC TESTING (OTHER THAN SYNCHRONIZATION)370/244, Of a switching system370/907, Synchronous Optical network (SONET)375/224, TESTING714/48, Error detection or notification714/704Error count or rate

Field of Search

370/241, DIAGNOSTIC TESTING (OTHER THAN SYNCHRONIZATION)370/242, Fault detection370/243, Of a repeater system370/244, Of a switching system370/246, Of a repeater370/250, Of a switching system370/252, Determination of communication parameters370/395.51, Utilizing a plurality of ATM networks (e.g., MPOA, SONET, or SDH)370/907, Synchronous Optical network (SONET)375/224, TESTING714/100, DATA PROCESSING SYSTEM ERROR OR FAULT HANDLING714/2, Fault recovery714/25, Fault locating (i.e., diagnosis or testing)714/48, Error detection or notification714/704, Error count or rate714/708Shutdown or establishing system parameter (e.g., transmission rate)

Examiners

Primary: Duong, Frank

Attorney, Agent or Firm

US Patent References

3916379, 5138616, Continuous on-line link error rate detector utilizing the frame bit error rate
Issued on: 08/11/1992
Inventor: Wagner, Jr., et al.
5467341, Apparatus and method for alerting computer users in a wireless LAN of a service area transition
Issued on: 11/14/1995
Inventor: Matsukane, et al.
5570373, Method and apparatus for testing a radio in a base station without using a radio test unit
Issued on: 10/29/1996
Inventor: Wing
5627837, Apparatus and method for suppressing protection switching in a digital communication system in the event of an error burst
Issued on: 05/06/1997
Inventor: Gillett
5724362, Apparatus and method employing a window reset for excessive bit error rate alarm detection and clearing
Issued on: 03/03/1998
Inventor: Lau
5764651, Bit error rate detection system
Issued on: 06/09/1998
Inventor: Bullock, et al.
5867096, Method for signal degradation alarm detection and cancellation in synchronous digital microwave system
Issued on: 02/02/1999
Inventor: Park
6310911Method of detecting signal degradation fault conditions within SONET and SDH signals
Issued on: 10/30/2001
Inventor: Burke, et al.

International Class

H04B 7208

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