Patent ReferencesLow voltage swing output MOS circuit for driving an ECL circuit Self biased low-voltage differential signal detector Differential high speed driver for low voltage operation High speed digital bus termination Method and apparatus for controlling the common-mode output voltage of a differential buffer Low voltage differential driver with multiple drive strengths Low voltage differential swing driver circuit Differential output circuit Line receiver circuit having termination impedances with transmission gates connected in parallel Driver circuit for high speed data InventorAssigneeApplicationNo. 09/626264 filed on 07/25/2000US Classes:326/30, Bus or line termination (e.g., clamping, impedance matching, etc.)326/86Bus drivingExaminersPrimary: Lam, Tuan T.Attorney, Agent or FirmInternational ClassH04L 25/02 (20060101)AbstractA low voltage differential I/O device and method is modeled using voltage sources and voltage dividers, rather than the current source and sink model of the prior art. In an exemplary implementation, a driver includes two pairs of transistors coupled between voltage sources, each pair associated with a respective logic state. Depending on the logic state to be signaled, one pair of transistors is driven strongly while the other pair is turned off. A differential voltage is established across the true and complement signal lines, the polarity of which is determined by which pair of transistors is driven, and the magnitude of which is readily determined by voltage division of the voltage sources across known resistances. The driver of the invention offers stable and low impedance across both logic states and common mode. Moreover, active devices and feedback are not required to establish a common mode voltage or impedance as in the prior art.Other References
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