U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Circuit switched switching system

Patent 6693903 Issued on February 17, 2004. Estimated Expiration Date: Icon_subject June 23, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3912873

TDM switching network for coded messages
Patent #: 3983330
Issued on: 09/28/1976
Inventor: Tongi

Hardwired marker for time folded TST switch with distributed control logic and automatic path finding, set up and release
Patent #: 4038497
Issued on: 07/26/1977
Inventor: Collins ,   et al.

Method and device for controlling a switching network
Patent #: 4495615
Issued on: 01/22/1985
Inventor: Wilcke

Method and apparatus for switching information between channels for synchronous information traffic and asynchronous data packets
Patent #: 4862451
Issued on: 08/29/1989
Inventor: Closs ,   et al.

Time-division switching circuit transforming data formats
Patent #: 4972407
Issued on: 11/20/1990
Inventor: Kawai

Method of controlling a frame phase of a time-division switch and frame phase variable time-division switch
Patent #: 5351238
Issued on: 09/27/1994
Inventor: Ashi, et al.

Switch array power reduction apparatus
Patent #: 5390333
Issued on: 02/14/1995
Inventor: Pritt, et al.

Large capacity ATM switch
Patent #: 5475679
Issued on: 12/12/1995
Inventor: Munter

Power saving time slot interchanger with random read/write cycles
Patent #: 5509005
Issued on: 04/16/1996
Inventor: Nagamoto

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Inventor

Application

No. 09/338661 filed on 06/23/1999

US Classes:

370/370, Having space switch as intermediate stage (e.g., T-S-T, T-S-S, or S-S-T)370/411Including sorting and merging networks

Examiners

Primary: Nguyen, Chau
Assistant: Hyun, Soon-Dong

International Classes

H04B 7/185 (20060101)
H04Q 11/06 (20060101)

Abstract

A circuit switched switching system and method includes a plurality of matrix transposition memories. The memories permute the order of incoming and outgoing data, and thereby increase the efficiency of the switch. The switch and matrix transposition memories may be disposed in a satellite. The switch may further include batching circuits for grouping together data from a single terminal device for more efficient transmission through the switch and for more efficient error correction.

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