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US Patent 6654903 - Vertical fault isolation in a computer system
US Patent Issued on November 25, 2003
Estimated Patent Expiration Date:
May 20, 2020Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
Estimated Patent Expiration Date:
May 20, 2020Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.AbstractThe invention provides a method for fault isolation in a computer system, such as a network device. The method calls for providing a plurality of modular processes, and forming groups, based on hardware in the computer system, of one or more of the plurality of modular processes. A fault within a group is detected, and recovery from the detected fault is accomplished without affecting processes or hardware in other groups.Other References
| InventorsAssigneeApplicationNo. 09/574440 filed on 05/20/2000US Classes:714/4, Of network714/43Bus, I/O channel, or network path component faultField of Search714/4Of networkExaminersPrimary: Beausoliel, RobertAssistant: McCarthy, Christopher Attorney, Agent or FirmUS Patent References4750136, Communication system having automatic circuit board initialization capabilityIssued on: 06/07/1988 Inventor: Arpin , et al.4942540, Method an apparatus for specification of communication parameters Issued on: 07/17/1990 Inventor: Black, et al.5283783, Apparatus and method of token ring beacon station removal for a communication network Issued on: 02/01/1994 Inventor: Nguyen, et al.5473752, Fault isolation circuit Issued on: 12/05/1995 Inventor: Beistle, et al.5515403, Apparatus and method for clock alignment and switching Issued on: 05/07/1996 Inventor: Sloan, et al.5638410, Method and system for aligning the phase of high speed clocks in telecommunications systems Issued on: 06/10/1997 Inventor: Kuddes5726607, Phase locked loop using a counter and a microcontroller to produce VCXO control signals Issued on: 03/10/1998 Inventor: Brede, et al.5740357, Generic fault management of a computer system Issued on: 04/14/1998 Inventor: Gardiner, et al.5748882, Apparatus and method for fault-tolerant computing Issued on: 05/05/1998 Inventor: Huang5850399, Hierarchical packet scheduling method and apparatus Issued on: 12/15/1998 Inventor: Ganmukhi, et al.5903564, Efficient multicast mapping in a network switch Issued on: 05/11/1999 Inventor: Ganmukhi, et al.5905730, High speed packet scheduling method and apparatus Issued on: 05/18/1999 Inventor: Yang, et al.5926463, Method and apparatus for viewing and managing a configuration of a computer network Issued on: 07/20/1999 Inventor: Ahearn, et al.5953314, Control processor switchover for a telecommunications switch Issued on: 09/14/1999 Inventor: Ganmukhi, et al.5991163, Electronic circuit board assembly and method of closely stacking boards and cooling the same Issued on: 11/23/1999 Inventor: Marconi, et al.5991297, Independently sizable memory pages for a plurality of connection ID types in a network switch Issued on: 11/23/1999 Inventor: Palnati, et al.5995511, Digital network including mechanism for grouping virtual message transfer paths having similar transfer service rates to facilitate efficient scheduling of transfers thereover Issued on: 11/30/1999 Inventor: Zhou, et al.6008805, Method and apparatus for providing multiple management interfaces to a network device Issued on: 12/28/1999 Inventor: Land, et al.6008995, Card cage accommodating PC cards of different size Issued on: 12/28/1999 Inventor: Pusateri, et al.6015300, Electronic interconnection method and apparatus for minimizing propagation delays Issued on: 01/18/2000 Inventor: Schmidt, Jr., et al.6021116, Method and apparatus for controlling data transfer rate using virtual queues in asynchronous transfer mode networks Issued on: 02/01/2000 Inventor: Chiussi, et al.6021263, Management of ATM virtual circuits with resources reservation protocol Issued on: 02/01/2000 Inventor: Kujoory, et al.6033259, Mounting arrangement for telecommunications equipment Issued on: 03/07/2000 Inventor: Daoud6041307, Technique for effectively managing resources in a network Issued on: 03/21/2000 Inventor: Ahuja, et al.6044540, Electronics chassis and methods of manufacturing and operating thereof Issued on: 04/04/2000 Inventor: Fontana6078595, Timing synchronization and switchover in a network switch Issued on: 06/20/2000 Inventor: Jones, et al.6233610, Communications network having management system architecture supporting reuse Issued on: 05/15/2001 Inventor: Hayball, et al.6314526, Resource group quorum scheme for highly scalable and highly available cluster system management Issued on: 11/06/2001 Inventor: Arendt, et al.6327675, Fault tolerant system and method Issued on: 12/04/2001 Inventor: Burdett, et al.6449733, On-line replacement of process pairs in a clustered processor architecture Issued on: 09/10/2002 Inventor: Bartlett, et al.6505311Network system having function of changing route upon failure Issued on: 01/07/2003 Inventor: Ichinohe, et al. International ClassesH04L 7/00 (20060101)H04L 12/24 (20060101) H04L 29/06 (20060101) H04L 12/56 (20060101) |
