Electronic package interconnect structure comprising lead-free solders
July 16, 2022. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 2105405 Interconnection structure and test method Method for forming tin-indium or tin-bismuth solder connection having increased melting temperature Lead-free alloy containing tin, silver and indium Lead-free, high temperature, tin based multi-component solder 5439639 Method for directly joining a chip to a heat sink Surface mount stress relief hidden lead package device and method Lead-free alloy containing tin, silver and indium Solder hierarchy for chip attachment to substrates InventorApplicationNo. 197291 filed on 07/16/2002US Classes:228/180.21, Component terminal to substrate surface (i.e., nonpenetrating terminal)228/180.22, Lead-less (or "bumped") device257/E23.023, Consisting of soldered or bonded constructions (EPO)257/E23.069Spherical bumps on substrate for external connection, e.g., ball grid arrays (BGA) (EPO)ExaminersPrimary: Lam, Cathy F.Attorney, Agent or FirmInternational ClassB23K 031/02AbstractA method and structure for forming an electronic package with an interconnect structure that comprises lead-free solders. The method first forms a module by initially providing a chip carrier, a first joiner solder that is lead-free, and a core interconnect (e.g., solder ball, solder column) that includes a lead-free core solder. The liquidus temperature T1L of the first joiner solder is less than a solidus temperature TCS of the core solder. A first end of the core interconnect is soldered to the chip carrier with the first joiner solder, which includes reflowing the first joiner solder at a reflow temperature that is above T1L and below TCS, followed by cooling the first joiner solder to a temperature that is below a solidus temperature of the first joiner solder. Thus, the module with the soldered core interconnect has been formed. The method then provides a circuit card and a second joiner solder that is lead-free. The liquidus temperature T2L of the second joiner solder is less than TCS. A second end of the core interconnect is soldered to the circuit card with the second joiner solder, which includes reflowing the second joiner solder at a reflow temperature that is above T2L and below TCS, followed by cooling the second joiner solder to a lower temperature that is below a solidus temperature of the second joiner solder.Other References
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