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US Patent 6581821 - Electronic package interconnect structure comprising lead-free solders
US Patent Issued on June 24, 2003
Estimated Patent Expiration Date:
July 16, 2022Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
Estimated Patent Expiration Date:
July 16, 2022Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.AbstractA method and structure for forming an electronic package with an interconnect structure that comprises lead-free solders. The method first forms a module by initially providing a chip carrier, a first joiner solder that is lead-free, and a core interconnect (e.g., solder ball, solder column) that includes a lead-free core solder. The liquidus temperature T1L of the first joiner solder is less than a solidus temperature TCS of the core solder. A first end of the core interconnect is soldered to the chip carrier with the first joiner solder, which includes reflowing the first joiner solder at a reflow temperature that is above T1L and below TCS, followed by cooling the first joiner solder to a temperature that is below a solidus temperature of the first joiner solder. Thus, the module with the soldered core interconnect has been formed. The method then provides a circuit card and a second joiner solder that is lead-free. The liquidus temperature T2L of the second joiner solder is less than TCS. A second end of the core interconnect is soldered to the circuit card with the second joiner solder, which includes reflowing the second joiner solder at a reflow temperature that is above T2L and below TCS, followed by cooling the second joiner solder to a lower temperature that is below a solidus temperature of the second joiner solder.Other References
| InventorApplicationNo. 197291 filed on 07/16/2002US Classes:228/180.21, Component terminal to substrate surface (i.e., nonpenetrating terminal)228/180.22, Lead-less (or "bumped") device257/E23.023, Consisting of soldered or bonded constructions (EPO)257/E23.069Spherical bumps on substrate for external connection, e.g., ball grid arrays (BGA) (EPO)Field of Search228/180.21, Component terminal to substrate surface (i.e., nonpenetrating terminal)228/180.22Lead-less (or "bumped") deviceExaminersPrimary: Lam, Cathy F.Attorney, Agent or FirmUS Patent References2105405, 5147084, Interconnection structure and test methodIssued on: 09/15/1992 Inventor: Behun, et al.5221038, Method for forming tin-indium or tin-bismuth solder connection having increased melting temperature Issued on: 06/22/1993 Inventor: Melton, et al.5256370, Lead-free alloy containing tin, silver and indium Issued on: 10/26/1993 Inventor: Slattery, et al.5328660, Lead-free, high temperature, tin based multi-component solder Issued on: 07/12/1994 Inventor: Gonya, et al. 5439639, 5533256, Method for directly joining a chip to a heat sink Issued on: 07/09/1996 Inventor: Call, et al.5573172, Surface mount stress relief hidden lead package device and method Issued on: 11/12/1996 Inventor: Gore5580520, Lead-free alloy containing tin, silver and indium Issued on: 12/03/1996 Inventor: Slattery, et al.5655703, Solder hierarchy for chip attachment to substrates Issued on: 08/12/1997 Inventor: Jimarez, et al.5658528, Lead-free solder Issued on: 08/19/1997 Inventor: Ninomiya, et al.5730932, Lead-free, tin-based multi-component solder alloys Issued on: 03/24/1998 Inventor: Sarkhel, et al.5733501, Lead-free solder alloy Issued on: 03/31/1998 Inventor: Takao, et al.5843371, Lead-free soldering material having superior solderability Issued on: 12/01/1998 Inventor: Yoo, et al.5874043, Lead-free, high tin ternary solder alloy of tin, silver, and indium Issued on: 02/23/1999 Inventor: Sarkhel, et al.5918795, Soldering alloy, cream solder and soldering method Issued on: 07/06/1999 Inventor: Yamaguchi, et al.5988485, Flux cleaning for flip chip technology using environmentally friendly solvents Issued on: 11/23/1999 Inventor: Master, et al.6010060, Lead-free solder process Issued on: 01/04/2000 Inventor: Sarkhel, et al.6056191, Method and apparatus for forming solder bumps Issued on: 05/02/2000 Inventor: Brouillette, et al.6224690, Flip-Chip interconnections using lead-free solders Issued on: 05/01/2001 Inventor: Andricacos, et al.6297559, Structure, materials, and applications of ball grid array interconnections Issued on: 10/02/2001 Inventor: Call, et al.6337445Composite connection structure and method of manufacturing Issued on: 01/08/2002 Inventor: Abbott, et al. International ClassB23K 031/02 |
