Multigate semiconductor device with vertical channel current and method of fabrication
Patent 6580124 Issued on June 17, 2003. Estimated Expiration Date: August 14, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
257/331, Plural gate electrodes or grid shaped gate electrode257/316, With additional contacted control electrode257/325, Non-homogeneous composition insulator layer (e.g., graded composition layer or layer with inclusions)257/391, Selected groups of complete field effect devices having different threshold voltages (e.g., different channel dopant concentrations)257/401With specified physical layout (e.g., ring gate, source/drain regions shared between plural FETs, plural sections connected in parallel to form power MOSFET)
The present invention is a multibit nonvolatile memory and its method of fabrication. According to the present invention a silicon channel body having a first and second channel surface is formed. A charge storage medium is formed adjacent to the first channel surface and a second charge storage medium is formed adjacent to the second channel surface. A first control gate is formed adjacent to the first charge storage medium adjacent to the first channel surface and a second control gate is formed adjacent to the second charge storage medium adjacent to the second surface.
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August 14, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
