Techniques for addressing cross-point diode memory arrays
Patent 6552409 Issued on April 22, 2003. Estimated Expiration Date: 
June 5, 2021. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
June 5, 2021. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesIntegrated circuit fusing technique Method of fabricating a programmable read-only memory cell incorporating an antifuse utilizing ion implantation Electronic matrix arrays and method for making the same Patent #: 4677742 InventorsApplicationNo. 875572 filed on 06/05/2001US Classes:257/529, Including programmable passive component (e.g., fuse)257/257, Light responsive or combined with light responsive device257/530, Anti-fuse257/910, DIODE ARRAYS (E.G., DIODE READ-ONLY MEMORY ARRAY)257/E23.149, Comprising fuses, i.e., connections having their state changed from conductive to nonconductive (EPO)257/E23.171, Adaptable interconnections, e.g., for engineering changes (EPO)257/E25.023Device consisting of plurality of semiconductor or other solid-state devices or components formed in or on common substrate, e.g., integrated circuit device (EPO)ExaminersPrimary: Tsai, JeyInternational ClassH01L 029/00AbstractA memory array and some addressing circuitry therefor are formed by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. The circuit elements formed at the crossing-points function as data storage devices in the memory array, and function as connections for a permuted addressing scheme for addressing the elements in the array. In order to construct the addressing circuitry, the electrode conductors are fabricated with a controlled geometry at selected crossing-points such that selected circuit elements have increased or decreased cross-sectional area. By applying a programming electrical signal to the electrodes, the electrical characteristics (e.g. resistance) of selected circuit elements can be changed according to the controlled electrode geometry. | |
