Nonvolatile semiconductor memory
Patent 6522583 Issued on February 18, 2003. Estimated Expiration Date: 
May 21, 2021. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
May 21, 2021. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesNon-volatile semiconductor memory device Nonvolatile semiconductor memory device Patent #: 6147911 InventorsApplicationNo. 860613 filed on 05/21/2001US Classes:365/185.17, Logic connection (e.g., NAND string)365/185.18, Particular biasing365/195InhibitExaminersPrimary: Le, Vu A.Attorney, Agent or FirmForeign Patent References
International ClassG11C 016/04Foreign Application Priority Data2000-05-22 JPAbstractA drain-side select gate line is set to VSG1 (>VDD) capable of sufficiently transferring VDD (time t1). Since all word lines in the selected block are set to Vread, VDD is applied to the channels of all memory cells in the cell units. After this, the drain-side select gate line is set to VSG2, and a program potential Vpgm is applied to the selected word line (times t2 to t3). Since VSG2 is sufficiently low, all drain-side select gate transistors are kept off, and the channel potentials of memory cells in all cell units are boosted. After this, since the drain-side select gate line is set to VSG3, the channel of the selected memory cell is set to 0V (time t4). | |
