U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Magneto-resistive memory having sense amplifier with offset control

Patent 6487111 Issued on November 26, 2002. Estimated Expiration Date: Icon_subject October 31, 2021. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3573485

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Patent #: 4132904
Issued on: 01/02/1979
Inventor: Harari

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Patent #: 4553053
Issued on: 11/12/1985
Inventor: Ong ,   et al.

Magnetoresistive memory including thin film storage cells having tapered ends
Patent #: 4731757
Issued on: 03/15/1988
Inventor: Daughton ,   et al.

Differential arrangement magnetic memory cell
Patent #: 4751677
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Inventor: Daughton ,   et al.

Differential magnetoresistive memory sensing
Patent #: 4829476
Issued on: 05/09/1989
Inventor: Dupuis ,   et al.

Non-volatile, radiation-hard, random-access memory
Patent #: 4887236
Issued on: 12/12/1989
Inventor: Schloemann

Sense amplifier input stage for single array memory
Patent #: 5349302
Issued on: 09/20/1994
Inventor: Cooper

Magnetic thin film memory device
Patent #: 5361226
Issued on: 11/01/1994
Inventor: Taguchi, et al.

Multilayer hard bias films for longitudinal biasing in magnetoresistive transducer
Patent #: 5434826
Issued on: 07/18/1995
Inventor: Ravipati, et al.

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Inventors

Application

No. 002071 filed on 10/31/2001

US Classes:

365/158Magnetoresistive

Examiners

Primary: Nguyen, Tan T.

Attorney, Agent or Firm

Foreign Patent References

  • 0 776 011 EP. 05/13/1997
  • WO 98/20496 WO. 05/13/1997

International Class

G11C 011/00

Abstract

A magneto-resistive memory is disclosed that includes a high-speed sense amplifier that can reliably operate at low signal levels. The sense amplifier includes offset cancellation to reduce or eliminate the internal offsets of the amplifier. The offset cancellation is controlled by one or more switches, which during operation, selectively enable the offset cancellation of the amplifier and store the offsets in one or more coupling capacitors.

Other References

  • B. Razavi and B.A. Wooley, "Design Techniques for High Speed, High Resolution Comparators", IEEE Journal of Solid State Circuits, vol. 27, pp. 1916-1926, Dec. 199
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