Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene
January 14, 2022. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSelf aligned via dual damascene Integrated circuit having local interconnect for reducing signal cross coupled noise Titanium aluminum alloy wetting layer for improved aluminum filling of damescene trenches Hard masking method for forming oxygen containing plasma etchable layer Method of fabricating dual damascene Method of making a tungsten nitride barrier layer with improved adhesion and stability using a silicon layer Patent #: 6326297 InventorsAssigneeApplicationNo. 043604 filed on 01/14/2002US Classes:257/751, At least one layer forms a diffusion barrier257/758, Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit)257/762, At least one layer containing silver or copper257/763, At least one layer of molybdenum, titanium, or tungsten257/764, Alloy containing molybdenum, titanium, or tungsten257/775Varying width or thickness of conductorExaminersPrimary: Chaudhuri, OlikAssistant: Smoot, Stephen W. Attorney, Agent or FirmForeign Patent References
International ClassH01L 023/52AbstractA method of forming amorphous silicon spacers followed by the forming of metal nitride over the spacers in a copper damascene structure--single, dual, or multi-structure--is disclosed in order to prevent the formation of fluorides in copper. In a first embodiment, the interconnection between the copper damascene and an underlying copper metal layer is made by forming an opening from the dual damascene structure to the underlying copper layer after the formation of the metal nitride layer over the amorphous silicon spacers formed on the inside walls of the dual damascene structure. In the second embodiment, the interconnection between the dual damascene structure and the underlying copper line is made from the dual damascene structure by etching into the underlying copper layer after the forming of the amorphous silicon spacers and before the forming of the metal nitride layer. In the third embodiment, the ternary metal silicon nitride spacer is formed by etching after having first formed the amorphous silicon layer and the nitride layer, in that order, and then etching the passivation/barrier layer at the bottom of the damascene structure into the underlying copper layer. In all three embodiments, metal nitride reacts with amorphous silicon to form a ternary metal silicon nitride having an excellent property of adhering to copper while at the same time for forming an excellent barrier to diffusion of copper.Field of SearchAt least one layer forms a diffusion barrierPlanarized to top of insulating layer Multiple metal levels on semiconductor, separated by insulating layer (e.g., multiple level metallization for integrated circuit) Separating insulating layer is laminate or composite of plural insulating materials (e.g., silicon oxide on silicon nitride, silicon oxynitride) At least one layer containing silver or copper At least one layer of molybdenum, titanium, or tungsten Alloy containing molybdenum, titanium, or tungsten Molybdenum, tungsten, or titanium or their silicides Varying width or thickness of conductor | |
