U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Semiconductor memory device

Patent 6452833 Issued on September 17, 2002. Estimated Expiration Date: Icon_subject February 2, 2021. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Semiconductor memory and screening test method thereof
Patent #: 5377152
Issued on: 12/27/1994
Inventor: Kushiyama, et al.

RE37184

Inventors

Application

No. 773606 filed on 02/02/2001

US Classes:

365/149, Capacitors365/203, Precharge365/230.06Particular decoder or driver circuit

Examiners

Primary: Nelms, David C.
Assistant: Auduong, Gene N.

Attorney, Agent or Firm

International Class

G11C 011/24

Foreign Application Priority Data

2000-02-07 JP

Abstract

A BL kicker circuit includes first capacitors each of which is connected at one end to a first bit line which is one of bit lines of a corresponding pair and commonly connected at the other end, second capacitors each of which is connected at one end to a second bit line which is the other one of the bit lines of a corresponding pair and commonly connected at the other end, a first driver circuit having an output node for a first signal connected to the common connection node of the other ends of the first capacitors, a second drive circuit having an output node for a second signal connected to the common connection node of the other ends of the second capacitors, and a switch circuit used as an equalizing circuit connected between the output node for the first signal and the output node for the second signal.

Other References

  • K-C Lee, et al., "Low Voltage High Speed Circiut Designs for Giga-bit DRAMs", 1996 Symposium on VLSI Circuits Digest of Technical Papers, pp. 104-105
  • Shinichiro Shiratake, et al., "A Pseudo Multi-Bank DRAM with Categorized Access Sequence", 1999 Symposium on VLSI Circuits Digest of Technical Papers, pp. 127-130
  • Yasuharu Sato, et al., "Fast Cycle RAM (FCRAM); a 20-ns Random Row Access, Pipe-Lined Operating DRAM", 1998 Symposium on VLSI Circuits Digest of Technical Papers, pp. 22-2
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