Method and apparatus for reducing power consumption in a digital processing system
September 30, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSystem for relocating dynamic memory address space having received microprocessor program steps from non-volatile memory to address space of non-volatile memory Dynamic non-volatile memory update in a computer system Network hibernation system for suspending and resuming operation of computer system operable in network environment in event of power failure or period of inactivity Method and apparatus for conserving power and system resources in a computer system employing a virtual memory Dynamic hibernation time in a computer system Dynamic hibernation time in a computer system Computer system for preventing cache malfunction by invalidating the cache during a period of switching to normal operation mode from power saving mode System and method for utilizing the memory of a portable computer as a disk cache while in SCSI target mode Computer hibernation implemented by a computer operating system Computer system with power loss protection mechanism Patent #: 6243831 InventorsAssigneeApplicationNo. 410192 filed on 09/30/1999US Classes:711/165, Internal relocation711/147, Shared memory area711/162BackupExaminersPrimary: Kim, MatthewAssistant: Elmore, Stephen C. Attorney, Agent or FirmForeign Patent References
International ClassG06F 012/00AbstractMethods and apparatuses for controlling power consumption in a digital processing system. In one aspect of the invention, an exemplary method includes using a non-volatile memory of the digital processing system (DPS) as a virtual memory of a volatile random access memory (RAM) of the DPS, determining a selection of a reduced power consumption state, storing, in response to the selection and through a virtual memory process, data from the volatile RAM to the non-volatile memory, and reducing power to at least one element of the data processing system after the storing, wherein the storing includes determining whether to store the data to the non-volatile memory by determining if first data previously stored as virtual memory in the non-volatile memory is valid (not dirty) after the selection. | |
