Abstract

In a sample-and-hold circuit using a completely differential type operational amplifier circuit, to promote operational stability, to restrain a variation in a balance point of a middle value of differential output signals and to promote stability and accuracy of an A/D converter are achieved by a constitution as bellow. There is provided a common phase feedback circuit 2, common phase feedback hold capacitors CF1 and CF2 of which are connected to input terminals IN1 and IN2 of a completely differential type operational amplifier circuit 1, during a sample period, by way of reset switches RS1 and RS2 connecting the input terminals IN1 and IN2 and output terminals OUT1 and OUT2 of the completely differential type operational amplifier circuit 1, the common phase feedback hold capacitors CF1 and CF2 are charged to thereby determine a balance point of a middle value of differential output signals from the output terminals OUT1 and OUT2 and during a hold period, the balance point of the middle value of the differential output signals is maintained by electric charge charged to the common phase feedback hold capacitors CF1 and CF2 regardless of the differential output signals.