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Method of operating flash memory Patent #: 6366499
ApplicationNo. 683463 filed on 01/03/2002
US Classes:365/185.28, Tunnel programming257/E27.103, Electrically programmable ROM (EPO)257/E29.309, With charge trapping gate insulator (e.g., MNOS-memory transistors) (EPO)365/185.18Particular biasing
ExaminersPrimary: Nguyen, Tan T.
Attorney, Agent or Firm
International ClassG11C 016/00
AbstractA method of selectively programming an individual memory cell of a non-volatile memory array. The non-volatile memory array is an array of memory cells. Each memory cell is made up of an ONO gate built on a substrate, which also acts as a well. On one side of the gate is a diffusion drain encompassed by a localized well region set in the well. On the other side of the gate is a diffusion source set in the well. When operated, appropriate voltages are applied to the source, the gate, the drain, and the localized well region to program or erase the non-volatile memory. The designed localized well region prevents an induction current in the unselected gates of the array, allowing for better selectivity and performance.