Patent ReferencesWafer polisher head having floating retainer ring Distributed polishing head Method of polishing semiconductor wafers and apparatus therefor Wafer polishing apparatus Polishing apparatus of semiconductor wafer Chemical mechanical polishing apparatus with improved carrier and method of use Semiconductor processing system with wafer container docking and loading station Carrier head design for a chemical mechanical polishing apparatus Continuous processing system for chemical mechanical polishing Apparatus for and method for polishing workpiece InventorsAssigneeApplicationNo. 540476 filed on 03/31/2000US Classes:451/286, By means loosely confining work451/289, Having vacuum or adhesive securing means451/398Rotary work holderExaminersPrimary: Eley, Timothy V.Assistant: Nguyen, Dung Van Attorney, Agent or FirmInternational ClassB24B 029/00AbstractAn apparatus and method are disclosed for planarizing a wafer in a carrier with adjustable pressure zones and adjustable barriers between zones. The carrier has an independently controlled central zone and concentric surrounding zones for distributing the pressure on the backside of a wafer while the wafer is being pressed against an abrasive surface in a chemical-mechanical polishing tool. The pressure zones may be created by mounting an elastic web diaphragm to a carrier housing that has a plurality of recesses. A corresponding plurality of elastic ring shaped ribs may extend from the web diaphragm opposite the recesses. The plurality of ring shaped ribs thereby defines a central zone surrounded by one or more concentric surrounding zones. The zones and barriers may be individually pressurized by utilizing corresponding fluid communication paths during the planarization process.A method for practicing the present invention starts by selecting a carrier with adjustable pressure zones that correspond to the number and locations of the bulges and troughs on the wafer. Zones that correspond to high regions receive greater pressure than zones that correspond to low regions on the wafer. The pressure on the barriers between zones may be optimized to prevent leakage between zones or to smooth the pressure distribution between neighboring zones on the back surface of the wafer. | |