Digital to analog converter using level and timing control signals to cancel noise
February 23, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesNoise shaping requantization circuit Multi-stage noise shaping over-sampling D/A converter Digital signal requantizing circuit using multistage noise shaping Analogue and digital convertors using pulse edge modulators with non-linearity error correction Digital, pulse width modulation audio power amplifier with noise and ripple shaping Digital converter Analogue and digital convertors using pulse edge modulators with non-linearity error correction Delta sigma pwm dac to reduce switching Patent #: 5815102 InventorAssigneeApplicationNo. 510818 filed on 02/23/2000US Classes:341/143, Differential encoder and/or decoder (e.g., delta modulation, differential pulse code modulation)341/144, Digital to analog conversion341/155Analog to digital conversionExaminersPrimary: JeanPierre, PeguyAttorney, Agent or FirmInternational ClassH03M 003/00AbstractA multiple stage delta sigma converter includes a first delta sigma modulator providing a first modulator output signal, a second delta sigma modulator providing a second output signal, and a pulse wave modulator for generating formatted output wherein the level (width) of the formatted output is dependent upon the first modulator output and the timing (delay) of the formatted output is dependent upon the second modulator output. The second modulator output is also based upon the first modulator feedback signal. The second modulator quantizer output and feedback signal are constrained by an output of the first converter. A 1 bit digital to analog converter connected to the output of the PWM converts the formatted output signal to an analog signal.Other References
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