Process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate
June 7, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod to radiation harden the buried oxide in silicon-on-insulator structures Process for the production of thin semiconductor material films Method for fabricating a semiconductor device using lateral gettering Radiation-hardening of SOI by ion implantation into the buried oxide layer Radiation-hard, low power, sub-micron CMOS on a SOI substrate Method for the transfer of thin layers of monocrystalline material to a desirable substrate Method for fabricating semiconductor wafers Method of separating films from bulk substrates by plasma immersion ion implantation Gettering technique for silicon-on-insulator wafers Pressurized microbubble thin film separation process using a reusable substrate InventorApplicationNo. 589013 filed on 06/07/2000US Classes:438/407, Nondopant implantation438/402, And gettering of substrate438/404, Total dielectric isolation438/406, Bonding of plural semiconductive substrates438/408, With electrolytic treatment step438/475Hydrogen plasma (i.e., hydrogenization)ExaminersPrimary: Dang, TrungInternational ClassH01L 021/76AbstractA process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate from thermally oxidized silicon wafer so that processing temperatures are limited to 900° C. is disclosed. The substrate is fabricated using H2 split process. Processing temperatures are limited to temperature of initiating of out-diffusion of oxygen from silicon dioxide into silicon. The limit prevents deterioration of buried oxide, and the oxide has low hole trap density that is equal to the trap density of an initial thermal silicon dioxide. Processing temperatures after implantation for H2 split process are limited to temperature of stability of dislocation microloops induced by the implantation at its damage peak. Resulting SOI structure have a gettering layer made from the microloops. The getter prevents yield drop caused by heavy metal contamination during the fabrication. Finished SOI devices have improved gate oxide integrity. Also, finished SOI circuitry has suppressed hot-electron controlled effects (backgating, transistor threshold voltage stability, side leakage). Also, radiation hardness of finished SOI devices is higher then the hardness of the SOI devices fabricated by conventional methods.Other References
| |
