Dynamic random access memory in switch MOSFETs between sense amplifiers and bit lines
December 29, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesLarge scale integrated circuit for low voltage operation Dynamic random access memory Irregular pitch layout for a semiconductor memory device Circuit and method for a memory device with P-channel isolation gates Device and method for stress testing a semiconductor memory Semiconductor memory device Semiconductor memory device Source follower NMOS voltage regulator with PMOS switching element Semiconductor memory device Patent #: 6212110 InventorsAssigneeApplicationNo. 750038 filed on 12/29/2000US Classes:365/190, For complementary information365/63, INTERCONNECTION ARRANGEMENTS365/207Differential sensingExaminersPrimary: Mai, SonAssistant: Auduong, Gene N. Attorney, Agent or FirmForeign Patent References
International ClassG11C 007/00Foreign Application Priority Data1998-12-24 JPAbstractSwitch MOSFETs are interposed between a sense amplifier disposed in a dynamic RAM and complementary bit lines. After signal voltages are read out by selecting operations of word lines from a plurality of dynamic memory cells selected, to the plurality of pairs of complementary bit lines in accordance with individual storage informations, the switch control signal of the switch MOSFETs is changed from a select level to a predetermined intermediate level. This turns on the switch MOSFETs thereby setting sense nodes to one level in accordance with the amplifying operations of the sense amplifier. An amplification signal generated by the amplifying operation is transmitted through the column select circuit to input/output lines in response to the column select signal, and the switch control signal is returned to the select level in response to the selecting operation of the column select circuit. | |
