Data processing system
Synchronization control system in a parallel computer
Multiprocessor system and process synchronization method therefor
Interleaved memory access system having variable-sized segments logical address spaces and means for dividing/mapping physical address into higher and lower order addresses
Multiprocessing system configured to perform synchronization operations Patent #: 5958019
ApplicationNo. 254307 filed on 03/03/1998
US Classes:713/502Counting, scheduling, or event timing
ExaminersPrimary: Butler, Dennis M.
Attorney, Agent or Firm
International ClassG06F 009/46
Foreign Application Priority Data1996-09-04 DE
AbstractA method for synchronization of concurrently running processes, in which, before it starts, each process is assigned a memory word which can be changed only by this process but can be read by all the other processes involved. This memory word is incremented twice for each synchronization step. Before each incrementation, a process waits until the memory word assigned to it is less than or equal to the values in the other memory words.