U.S. patents available from 1976 to present.
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Recycling A/D converter

Patent 6320530 Issued on November 20, 2001. Estimated Expiration Date: Icon_subject May 31, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Analog-to-digital conversion circuit with improved differential linearity
Patent #: 5416485
Issued on: 05/16/1995
Inventor: Lee

Pipelined multi-stage analog-to-digital converter
Patent #: 5635937
Issued on: 06/03/1997
Inventor: Lim, et al.

Digital to analog converter using capacitors and switches for charge distribution
Patent #: 5696509
Issued on: 12/09/1997
Inventor: Maejima

Recirculating A/D or D/A converter with single reference voltage Patent #: 6016115
Issued on: 01/18/2000
Inventor: Heubi

Inventor

Assignee

Application

No. 583869 filed on 05/31/2000

US Classes:

341/163, Recirculating341/172Using charge transfer devices (e.g., charge coupled devices, charge transfer by switched capacitances)

Examiners

Primary: Lam, Tuan T.

Attorney, Agent or Firm

Foreign Patent References

  • 5-152959 JP. 06/13/1993
  • 5-244003 JP. 09/13/1993
  • 5-77218 JP. 10/13/1993
  • 6-83070 JP. 10/13/1994
  • 6-83072 JP. 10/13/1994
  • 6-83069 JP. 10/13/1994

International Class

H03M 001/66

Foreign Application Priority Data

1999-06-01 JP

Abstract

After a second (i.e., 2nd -step) A/D conversion code n2 is produced from an A/D conversion circuit 1, a switch S10 is turned off and a switch S11 is turned on so that an operational amplifier 3 and a capacitor CF cooperate as a hold circuit. Arrayed capacitors C0 to C7 are charged based on an output voltage of the operational amplifier 3. Next, switches S11 and S12 are turned off and switches S13 to S15 are turned on to initialize the electric charge of the capacitor CF to 0 and to charge a capacitor CIN to a predetermined level (=V1+VOFF), wherein VOFF is an offset voltage of the operational amplifier 3. Subsequently, switches S13 to S15 are turned off and the switch S12 is turned on. Then, the switch S10 is turned on and switches S0 to S7 are shifted to a reference voltage terminal 2 or to a ground terminal GND, thereby implementing charge redistribution.

Other References

  • "A 10-b 15-MHz CMOS Recycling Two-Step A/D Converter"by B.S.Song, S.H.Lee, M.F. Tompsett; IEEE Journal of Solid-State Circuits. vol. 25, no. 6; Dec. 1990; pp.,1328-1338
  • "Digital-Domain Calibration of Multistep Analog-to-Digital Converters"by S H. Lee & B.S. Song; IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992; pp.,1679-168
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