Semiconductor substrate and method of manufacturing the same
Patent 6315826 Issued on November 13, 2001. Estimated Expiration Date: 
June 22, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
June 22, 2020. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesGettering Method of forming a defect-free semiconductor layer on insulator Semiconductor substrate for bipolar element Method of making a semiconductor memory device having a floating gate Semiconductor device and method for manufacturing the same Quiet connector between rocker arm and valve stem Patent #: 5806477 InventorAssigneeApplicationNo. 599193 filed on 06/22/2000US Classes:117/95, Coating (e.g., masking, implanting)117/2, PROCESSES OF GROWTH WITH A SUBSEQUENT STEP ACTING ON THE CRYSTAL TO ADJUST THE IMPURITY AMOUNT (E.G., DIFFUSING, DOPING, GETTERING, IMPLANTING)117/3, PROCESSES OF GROWTH WITH A SUBSEQUENT STEP OF HEAT TREATING OR DELIBERATE CONTROLLED COOLING OF THE SINGLE-CRYSTAL117/96, For autodoping control117/97, Material removal (e.g., etching, cleaning, polishing)117/935, Silicon from vapor or gaseous state {C30B 29/06}257/E21.214, To change their surface-physical characteristics or shape, e.g., etching, polishing, cutting (EPO)257/E21.318Of silicon body, e.g., for gettering (EPO)ExaminersPrimary: Kunemund, RobertAttorney, Agent or FirmInternational ClassC30B 025/18Foreign Application Priority Data1997-02-12 JPAbstractDisclosed are a structure of a semiconductor substrate and a method of manufacturing the semiconductor substrate preventing a reduction of gettering capability due to a high-temperature heat treatment. In a semiconductor substrate containing a highly concentrated impurity having a polysilicon layer to be a gettering site on a rear surface side and an epitaxial layer 6 on a front surface side, an impurity concentration is lower near the rear and front surfaces and higher at the center in a cross section of the semiconductor substrate. The method of manufacturing the semiconductor substrate comprises the steps of: performing the heat treatment of a silicon substrate at a temperature of 1100° C. or more and a melting temperature or less of the silicon substrate before forming the polysilicon layer 4 and the epitaxial layer 6; forming the polysilicon layer 4 on the rear surface side of the silicon substrate; and forming the epitaxial layer 6 on the front surface side of the silicon substrate.Other References
Field of SearchPROCESSES OF GROWTH WITH A SUBSEQUENT STEP ACTING ON THE CRYSTAL TO ADJUST THE IMPURITY AMOUNT (E.G., DIFFUSING, DOPING, GETTERING, IMPLANTING)PROCESSES OF GROWTH WITH A SUBSEQUENT STEP OF HEAT TREATING OR DELIBERATE CONTROLLED COOLING OF THE SINGLE-CRYSTAL Coating (e.g., masking, implanting) For autodoping control Material removal (e.g., etching, cleaning, polishing) Silicon from vapor or gaseous state {C30B 29/06} | |
