Assembly language programming potential error detection scheme sensing apparent inconsistency with a previous operation
Computer with integrated hierarchical representation (IHR) of program wherein IHR file is available for debugging and optimizing during target execution
System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling
Externally updatable ROM (EUROM)
Efficient optimal data recopression method and apparatus
Flash file system
Emulation techniques giving necessary information to a microcomputer to perform software debug and system debug even for incomplete target system
Emulation of CISC instructions by RISC instructions using two pipelined stages for overlapped CISC decoding and RISC execution
Emulation system for emulating CPU core, CPU core with provision for emulation and ASIC having the CPU core
Two-digit hybrid radix year numbers for year 2000 and beyond
ApplicationNo. 210542 filed on 12/14/1998
US Classes:717/114, Programming language717/124, Testing or debugging717/140Compiling code
ExaminersPrimary: Powell, Mark R.
Assistant: Das, Chameli C.
Attorney, Agent or Firm
International ClassG06F 009/45
AbstractA system for facilitating assembly language programming by providing a sophisticated hybrid programming environment comprising a module to parse input hybrid source code files containing at least one high-level instruction; a library of functions for defining at least one assembly-language instruction in the hybrid source code file from a corresponding high-level instruction; a module for translating the high-level instructions into machine language instructions according to the library; and a module to output the translated machine language instructions into an object file.
Field of SearchOf computer software