Semiconductor device and method for manufacturing the same
Patent 6307272 Issued on October 23, 2001. Estimated Expiration Date: 
May 25, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
May 25, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSemiconductor device including plateless package Patent #: 4546374 InventorsAssigneeApplicationNo. 317853 filed on 05/25/1999US Classes:257/787, ENCAPSULATED257/666, LEAD FRAME257/672, Small lead frame (e.g., "spider" frame) for connecting a large lead frame to a semiconductor chip257/678, HOUSING OR PACKAGE257/793, Including epoxide257/E23.044For devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (EPO)ExaminersPrimary: Clark, Jhihan BAttorney, Agent or FirmForeign Patent References
International ClassesH01L 023/495H01L 023/02 H01L 023/28 Foreign Application Priority Data1998-05-27 JPAbstractA package is disclosed in which deterioration of insulating encapsulation resin attributable to the generation of heat at source wires caused by an increase in a drain current is prevented. Specifically, there is provided a semiconductor package including a header made of metal, a semiconductor chip forming a power MOSFET secured on the header, an encapsulation element made of insulating resin covering the semiconductor chip, header and the like, a suspended lead contiguous with the header protruding from one side surface of the encapsulation element, a source lead and a gate lead protruding in parallel from one side surface of the encapsulation element, and wires positioned in the encapsulation element for connecting electrodes on the upper surface of the semiconductor chip and the source and gate leads. The source lead is constituted by a plurality of leads in parallel with each other, and the ends of the leads are coupled into one coupling portion in the encapsulation element. The coupling portion and the electrodes on the semiconductor chip are connected by a plurality of aluminum wires.Other References
Field of SearchENCAPSULATEDLEAD FRAME Including epoxide HOUSING OR PACKAGE Small lead frame (e.g., "spider" frame) for connecting a large lead frame to a semiconductor chip With means for controlling lead tension With heat sink means With structure for mounting semiconductor chip to lead frame (e.g., configuration of die bonding flag, absence of a die bonding flag, recess for LED) Lead frame Lead frame | |
